Patents by Inventor Joseph C. Klein

Joseph C. Klein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7539912
    Abstract: Described embodiments relate to a method of testing fully buffered memory modules that involves placing a buffer device, a test vectors generator, and a switch into a memory device tester, coupling the buffer device and the test vectors generator to the switch inside the tester, coupling the switch to an identical buffer device that is located on a memory module with plurality of DRAM devices, and testing the plurality of DRAM devices and the buffer device of the memory module. An apparatus implementing the method comprises a memory device tester, a memory bus, and a plurality of memory modules under test, the tester and the plurality of memory modules connected to the memory bus in a point-to-point manner, the tester comprising a buffer device, a test vectors generator, and a switch, the tester connected to the memory bus through the switch, each memory module under test having a plurality of DRAM devices and an identical buffer device.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: May 26, 2009
    Assignee: King Tiger Technology, Inc.
    Inventors: Hong Liang Chan, Allen Lawrence, Sunny Chang, Joseph C. Klein, Bosco Lai
  • Patent number: 6892328
    Abstract: A distributed tester method and system communicates test recipes for testing electronic devices from a host computer over a network to a test site. The test site translates test recipes into test instructions for execution by a test engine that determines the status of the electronic device. For instance, in a tester for testing memory, a test recipe is defined and stored with a host computer to determine test data for storage on the memory device under test at the test site. The host computer controls execution of the test recipe over the network. The test recipe is defined and stored in an XML formatted data file transmitted over the network to a processor at the test site. The test site processor translates the XML formatted data into test instructions for execution by a test engine. The test engine determines whether the memory device under test accurately stores data and provides the results, such as erroneously stored data, to the host computer through the network.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: May 10, 2005
    Assignee: Tanisys Technology, Inc.
    Inventors: Joseph C. Klein, Jack C. Little, Paul R. Hunter, Archer R. Lawrence
  • Publication number: 20020042897
    Abstract: A distributed tester method and system communicates test recipes for testing electronic devices from a host computer over a network to a test site. The test site translates test recipes into test instructions for execution by a test engine that determines the status of the electronic device. For instance, in a tester for testing memory, a test recipe is defined and stored with a host computer to determine test data for storage on the memory device under test at the test site. The host computer controls execution of the test recipe over the network. The test recipe is defined and stored in an XML formatted data file transmitted over the network to a processor at the test site. The test site processor translates the XML formatted data into test instructions for execution by a test engine. The test engine determines whether the memory device under test accurately stores data and provides the results, such as erroneously stored data, to the host computer through the network.
    Type: Application
    Filed: September 27, 2001
    Publication date: April 11, 2002
    Applicant: Tanisys Technology Inc.
    Inventors: Joseph C. Klein, Jack C. Little, Paul R. Hunter, Archer R. Lawrence