Patents by Inventor Joseph Chan

Joseph Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070164365
    Abstract: A single stress liner is applied over different type semiconductor devices. The single stress liner avoids the problems of a dual/hybrid stress liner scheme by eliminating the meeting area. The single stress liner may be tensile or compressive. In one embodiment, the semiconductor device includes a static random access memory (SRAM) cell having numerous NFETs and PFETs. In this case, a compressive liner is placed over the SRAM cell, which is normally not ideal for the NFETs therein, but is desirable for the SRAM cell because continued miniaturization of the SRAMs typically requires slowing of the NFETs for the SRAM to maintain stabile. Where SRAM cells require increased speed, a single tensile stress liner can be implemented.
    Type: Application
    Filed: January 17, 2006
    Publication date: July 19, 2007
    Inventors: Joseph Chan, Robert Wong
  • Publication number: 20070159357
    Abstract: A tag receives a wireless signpost signal that contains a signpost code, converts the signpost code into location information representative of a physical location of a signpost that transmitted the received signpost signal, and transmits a wireless tag signal that includes the location information. In a different configuration, a tag receives a wireless signpost signal that includes a signpost code, and determines whether the signpost that generated the received signpost signal is a replacement for a different signpost. If it is a replacement, the tag transmits a wireless tag signal containing an information portion that relates to the signpost replaced by the signpost that generated the received signpost signal.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 12, 2007
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn
  • Publication number: 20070159360
    Abstract: A tag can transmit a tag signal, and responds to receipt of a wireless signpost signal by determining whether the signpost that generated the signal is currently active. When the signpost is respectively determined to be active and inactive, the tag respectively includes and excludes from the tag signal an information portion that relates to the signpost that generated the received signpost signal. In another configuration, a tag has first and second antennas, receives wireless signpost signals through at least one of the antennas, and responds to receipt of a signpost signal containing antenna select information by causing a selected one of the first and second antennas to be disabled and the other of the first and second antennas to receive wireless signpost signals.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 12, 2007
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn
  • Publication number: 20070159358
    Abstract: A tag receives wireless signpost signals that include timing data, determines time information associated with an event as a function of the timing data, and transmits a wireless tag signal that contains the time information. In a another configuration, a signpost transmits wireless signpost signals having a selected transmission range; a reader proximate to the signpost receives wireless tag signals with a reception range that is approximately the same as the selected transmission range; and a tag movable relative to the signpost and reader responds to receipt of a wireless signpost signal by transmitting a wireless tag signal containing a tag code associated with the tag.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 12, 2007
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Albert Nardelli
  • Publication number: 20070159359
    Abstract: A tag stores information identifying the sequence in which it received wireless signpost signals from different signposts. In another configuration, a tag maintains data identifying a group of signposts that are to be treated as equivalent. In yet another configuration, wireless signpost signals transmitted by each of a plurality of signposts all contain the same signpost code. In still another configuration, a signpost has an interface through which a signpost code of the signpost can be selectively set.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 12, 2007
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn, Neal Herman
  • Publication number: 20060271315
    Abstract: One aspect of the invention involves: periodically sampling a voltage of a battery and an ambient temperature in order to obtain a sample that includes a temperature value and a voltage value; saving each sample in a sample group; selecting a subset of the samples in the group, wherein the temperature value of each sample in the subset is lower than the temperature value of substantially all of the samples of the group other than the subset; and determining as a function of the voltage of at least one the sample in the subset whether the battery is subject to a low voltage condition.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn
  • Publication number: 20060267555
    Abstract: One aspect of the invention involves: maintaining a record of how long a circuit operates in each of a plurality of different operating modes thereof, starting from a point in time at which a battery that powers the circuit is replaced; calculating for each of the operating modes as a function of the record a cumulative current drain from the point in time to a current time; and determining as a function of the cumulative current drains whether the battery is subject to a low voltage condition. Another aspect involves: monitoring a voltage of a battery; periodically determining whether the voltage of the battery is subject to a low voltage condition; and maintaining a count of the number of times that the determining results in a determination that the battery is subject to a low voltage condition.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn
  • Publication number: 20060267554
    Abstract: One aspect of the invention involves: monitoring a voltage of a battery over time; evaluating whether a rate of voltage decrease of the battery is in excess of a threshold; and indicating that the battery is subject to a low voltage condition when the rate of voltage decrease exceeds the threshold. Another aspect of the invention involves: causing a circuit powered by a battery to respond to battery replacement by thereafter applying a selected load to the battery during a selected time interval. A further aspect involves: periodically sampling a voltage of a battery; and applying a load to the battery during a selected time interval before each sampling of the battery voltage.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Nikola Cargonja, Joseph Chan, Don Ahn
  • Publication number: 20060202825
    Abstract: A conveyance tracking system provides two-phase transaction commit processing for synchronizing seal state information between a seal device attached to a conveyance and a host for tracking conveyances. The system uses a reader device for synchronization and communication between the seal device and host system regarding various operations, such as a lock operation, an unlock operation, and a clear tamper operation. In the first phase of the two-phase commit, the seal device prepares for the operation and the host executes the operation. In the second phase, the seal device fulfills the irreversible operation, ensuring that the seal state of the seal device and host are in sync.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 14, 2006
    Inventors: Ravindra Rajapakse, Leo Chang, Joseph Chan, Jeyappragash Jeyakeerthi, Andrew Edward Alcock
  • Publication number: 20060077041
    Abstract: An apparatus (10, 240, 300) includes a signpost (11, 241-256, 322, 612, 623, 626-628, 652, 661, 682, 686, 703) which transmits signpost signals (24) that are received by a tag (12, 271-275, 301-316, 395-397, 616-618, 641-643, 653, 656-657, 662-664, 679, 708, 711). The tag in turn transmits radio frequency beacon signals (72) which are received by a reader (13, 261, 319, 521-530). The tag can vary the duration of the beacon signals, for example in dependence on whether it is currently receiving a signpost signal. Further, the tag can dynamically vary the transmission rate and/or transmission power of the beacon signals, for example following receipt of a signpost signal. Varying these parameters can facilitate compliance with governmental regulations.
    Type: Application
    Filed: September 2, 2005
    Publication date: April 13, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Joseph Chan, Nikola Cargonja, James Eagleson, Arthur Anderson, Timothy Brand, Ravindra Rajapakse
  • Publication number: 20060009651
    Abstract: The present invention is directed to benzophenone compounds useful in the inhibition of HIV reverse transcriptase, particularly its resistant varieties.
    Type: Application
    Filed: September 9, 2005
    Publication date: January 12, 2006
    Inventor: Joseph Chan
  • Patent number: 6965632
    Abstract: A method and apparatus for initial acquisition using an adaptive threshold includes performing a sort operation of a plurality of full-length correlator outputs and updating the adaptive threshold. Partial-length correlator outputs are generated and compared with an adaptive threshold. If a partial-length correlator output for a particular PN sequence timing is greater than or equal to the adaptive threshold, a full-length correlator output for that PN sequence timing is generated. A sort operation of a plurality of full-length correlator outputs is performed, and sort results are used to update the adaptive threshold. If a partial-length correlator output for a particular PN sequence timing is less than the adaptive threshold, a full-length correlator output for that PN sequence timing is not generated.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: November 15, 2005
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Koji Kimura, Joseph Chan
  • Publication number: 20050177517
    Abstract: A transaction processing system for processing a transaction between a supplier and a customer, said system comprising a supplier device for initiating the transaction, a system server and a mobile communication device, said device containing a message processing program module for enabling local verification of the transaction within the mobile device, wherein a transaction message is sent from the supplier device to the system server, a message requesting payment for the transaction is sent from the system server to the mobile communication device, the transaction is authorised and verified at the mobile telecommunications device from which a verification message is sent back to the system server, and the transaction is then processed.
    Type: Application
    Filed: December 4, 2002
    Publication date: August 11, 2005
    Inventors: Gary Leung, Rudolph Lee, Kevin Cheng, Peter Chui, Andrew Mitchell, Shahen Mekertichian, Raymond Fung, Joseph Chan
  • Publication number: 20050165755
    Abstract: A method and system in accordance with the invention provides both real time and historical information regarding requests executed on a first server and on a second server. Applications running on two or more servers are monitored. Users are provided with information concerning requests being executed on the two or more servers, which information identifies any request that includes operations performed on more than one server. Information presented to the user includes information identifying two or more servers, processes executed or recently executed on each server in connection with a single request, and methods associated with a single request. Such information may be provided on a single display for a single request, and include information relating to two or more servers. Users may be provided with the ability to drill down to obtain more detailed information.
    Type: Application
    Filed: August 16, 2004
    Publication date: July 28, 2005
    Inventor: Joseph Chan
  • Patent number: 6908841
    Abstract: A semiconductor device (200) having support structures (218, 226, 236) beneath wirebond regions (214) of contact pads (204) and a method of forming same. Low modulus dielectric layers (216, 222, 232) are disposed over a workpiece (212). Support structures (218, 226, 236) are formed in the low modulus dielectric layers (216, 222, 232), and support vias (224, 234) are formed between the support structures (218, 226, 236). A high modulus dielectric film (220, 230) is disposed between each low modulus dielectric layer (216, 222, 232), and a high modulus dielectric layer (256) is disposed over the top low modulus dielectric layer (232). Contact pads (204) are formed in the high modulus dielectric layer (256). Each support via (234) within the low modulus dielectric layer (232) resides directly above a support via (224) in the underlying low modulus dielectric layer (222), to form a plurality of via support stacks within the low modulus dielectric layers (216, 222, 232).
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: June 21, 2005
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Lloyd G. Burrell, Douglas Kemerer, Henry A. Nye, III, Hans-Joachim Barth, Emmanuel F. Crabbe, David Anderson, Joseph Chan
  • Patent number: 6909320
    Abstract: A dual output voltage regulator circuit includes a first voltage regulator section, the first voltage regulator section having a first regulated voltage output, a second voltage regulator section coupled to the first voltage regulator section, the second voltage regulator having a second regulated voltage output, and a switching circuit coupled to the first voltage regulator section and to the second voltage regulator section, the switching circuit operating the first voltage regulator section and the second voltage regulator section in a normal mode, and operating only the second voltage regulator section in a power gating mode.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: June 21, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Joseph Chan, Dennis Cashen
  • Publication number: 20050010840
    Abstract: A bit error position is estimated. The estimation method includes generating data indicative of a substantial number of bit error locations in data frames. The generation of the data includes re-encoding decoded bit stream, mapping the bit stream to a first set of symbols, and determining a soft decision distance between a second set of symbols received through a data transmission channel and the first set of symbols. The generated data is then used to estimate the bit error locations. The estimation process includes capturing metric data for each bit in the data frame and obtaining derivative of the metric data. The derivative may be filtered for further processing. Error position estimation criteria may then be applied to estimate the bit error positions.
    Type: Application
    Filed: August 6, 2004
    Publication date: January 13, 2005
    Inventors: Robert Dorney, Joseph Chan
  • Publication number: 20040257151
    Abstract: A dual output voltage regulator circuit includes a first voltage regulator section, the first voltage regulator section having a first regulated voltage output, a second voltage regulator section coupled to the first voltage regulator section, the second voltage regulator having a second regulated voltage output, and a switching circuit coupled to the first voltage regulator section and to the second voltage regulator section, the switching circuit operating the first voltage regulator section and the second voltage regulator section in a normal mode, and operating only the second voltage regulator section in a power gating mode.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Inventors: Joseph Chan, Dennis Cashen
  • Publication number: 20040058520
    Abstract: A semiconductor device (200) having support structures (218, 226, 236) beneath wirebond regions (214) of contact pads (204) and a method of forming same. Low modulus dielectric layers (216, 222, 232) are disposed over a workpiece (212). Support structures (218, 226, 236) are formed in the low modulus dielectric layers (216, 222, 232), and support vias (224, 234) are formed between the support structures (218, 226, 236). A high modulus dielectric film (220, 230) is disposed between each low modulus dielectric layer (216, 222, 232), and a high modulus dielectric layer (256) is disposed over the top low modulus dielectric layer (232). Contact pads (204) are formed in the high modulus dielectric layer (256). Each support via (234) within the low modulus dielectric layer (232) resides directly above a support via (224) in the underlying low modulus dielectric layer (222), to form a plurality of via support stacks within the low modulus dielectric layers (216, 222, 232).
    Type: Application
    Filed: September 20, 2002
    Publication date: March 25, 2004
    Inventors: Lloyd G. Burrell, Douglas Kemerer, Henry A. Nye, Hans-Joachim Barth, Emmanuel F. Crabbe, David Anderson, Joseph Chan
  • Patent number: D472538
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: April 1, 2003
    Assignee: VTech Communications, Ltd.
    Inventor: Joseph Chan