Patents by Inventor Joseph D. Montalbo

Joseph D. Montalbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9548604
    Abstract: The present disclosure is directed to a system for battery management and protection. A battery protection circuit may include a power semiconductor switch and a control integrated circuit (IC). The battery protection circuit may be configured to regulate the charging and/or discharging of a battery and further prevent the battery from operating outside of a safe operating area based on a protection trip point (e.g. overcurrent detection point) of the protection IC. The protection IC may be configured to calibrate a protection trip point so as to compensate for process and temperature variations of on resistance (RSSon) of the power semiconductor switch.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: January 17, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tomas Andres Moreno, Joseph D. Montalbo, Sung Geun Yoon, Roger Yeung
  • Publication number: 20140354238
    Abstract: The present disclosure is directed to a system for battery management and protection. A battery protection circuit may include a power semiconductor switch and a control integrated circuit (IC). The battery protection circuit may be configured to regulate the charging and/or discharging of a battery and further prevent the battery from operating outside of a safe operating area based on a protection trip point (e.g. overcurrent detection point) of the protection IC. The protection IC may be configured to calibrate a protection trip point so as to compensate for process and temperature variations of on resistance (RSSon) of the power semiconductor switch.
    Type: Application
    Filed: June 2, 2014
    Publication date: December 4, 2014
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Tomas Andres MORENO, Joseph D. MONTALBO, Sung Geun YOON, Roger YEUNG
  • Patent number: 8531226
    Abstract: In one general aspect, an apparatus can include a polarity insensitive input coupled to a gate of a metal-oxide-semiconductor field effect transistor (MOSFET) device. The MOSFET device can have a gate dielectric rating greater than twenty-five volts. The apparatus can also include a fixed polarity output coupled to a source of the MOSFET device.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: September 10, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph D. Montalbo, Steven Sapp
  • Publication number: 20120242390
    Abstract: In one general aspect, an apparatus can include a polarity insensitive input coupled to a gate of a metal-oxide-semiconductor field effect transistor (MOSFET) device. The MOSFET device can have a gate dielectric rating greater than twenty-five volts. The apparatus can also include a fixed polarity output coupled to a source of the MOSFET device.
    Type: Application
    Filed: October 11, 2011
    Publication date: September 27, 2012
    Inventors: Joseph D. Montalbo, Steven Sapp
  • Publication number: 20070263099
    Abstract: A method for generating an ambient light rejected output image includes providing a sensor array including a two-dimensional array of digital pixels where the digital pixels output digital signals as digital pixel data representing the image of the scene, capturing a pair of images of a scene within the time period of a video frame using the sensor array where the pair of images includes a first image being illuminated by ambient light and a second image being illuminated by the ambient light and a light source, storing the digital pixel data associated with the first and second images in a data memory, and subtracting the first image from the second image to obtain the ambient light rejected output image.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 15, 2007
    Applicant: PIXIM INC.
    Inventors: Ricardo J. Motta, Ting Chen, Douglas K. Tao, Joseph D. Montalbo
  • Patent number: 7130693
    Abstract: A method for increasing a resolution and decreasing a power dissipation in an epiretinal implant device is described. The method includes positioning extendable microprobes to achieve mechanical contact with an anterior surface of the retina when the epiretinal implant device is activated. A level of pressure of the contact and an amount of current to be applied for stimulation of ganglion cells may be determined for optimum power consumption and stimulation. The contact of the microprobes with the retina, which may include MEMS, and an additional effect of mechanical stimulation enables reduction of current dissipation. Reduced current allows employment of more microprobes increasing resolution. The level of contact pressure and applied current may be dynamically re-determined based on changing ambient light conditions, and the like. A random duty-cycling of the mechanical contact and applied current may provide further reduction of current dissipation.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: October 31, 2006
    Assignee: National Semiconductor Corporation
    Inventor: Joseph D. Montalbo