Patents by Inventor Joseph F. Wrinn

Joseph F. Wrinn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9001456
    Abstract: In general, a test slot is engaged with automated machinery to inhibit movement of the test slot, thereby inhibiting transmission of vibration from the test slot to its surroundings. While the automated machinery is engaged with the test slot, the automated machinery is actuated to insert a storage device into the test slot, or remove the storage device from the test slot.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 7, 2015
    Assignee: Teradyne, Inc.
    Inventors: Philip Campbell, Joseph F. Wrinn
  • Publication number: 20120050903
    Abstract: In general, a test slot is engaged with automated machinery to inhibit movement of the test slot, thereby inhibiting transmission of vibration from the test slot to its surroundings. While the automated machinery is engaged with the test slot, the automated machinery is actuated to insert a storage device into the test slot, or remove the storage device from the test slot.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Inventors: Philip Campbell, Joseph F. Wrinn
  • Patent number: 8031929
    Abstract: According to one embodiment, a method for processing one or more X-ray images includes: receiving at least one image of the one or more X-ray images, the one or more X-ray images being of an assembly extending along a plane; based on the at least one image, autonomously determining a respective displacement value for each of portions of the assembly with respect to one or more directions of the plane, each of the displacement values being determined relative to a respective actual value; storing the displacement values; and applying a rule to the stored displacement values, the rule being for determining a defect status of the assembly.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: October 4, 2011
    Assignee: Teradyne, Inc.
    Inventors: Govindarajan T. Srinivasan, Michael W. Hamblin, Joseph F. Wrinn, Peter A. Reichert
  • Patent number: 7819581
    Abstract: According to one embodiment, a calibration system for calibrating image data produced by an imaging system is provided. The calibration system includes a processor configured for: receiving the image data from the imaging system; receiving a plurality of reference values from the imaging system; and calibrating the image data using the reference values. The reference values correspond to air image data produced by the imaging system.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: October 26, 2010
    Assignee: Teradyne, Inc.
    Inventors: Govindarajan T. Srinivasan, Peter A. Reichert, Michael W. Hamblin, Joseph F. Wrinn, Dennis R. LaFosse
  • Patent number: 7626175
    Abstract: According to one embodiment, a system for linearizing image data corresponding to one or more objects and output by an imaging device is provided. The system includes a processor configured for: receiving the image data from the imaging device; and producing a generally linear relationship between the image data and a thickness of the one or more objects. The generally linear relationship is produced according to the equation I = I o ? ? u l ? l . I is an intensity of the image data, I0 is an intensity of energy produced by the imaging device for outputting the image data, ? is an attenuation coefficient of the one or more objects, and l is the thickness of the one or more objects.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: December 1, 2009
    Assignee: Teradyne, Inc.
    Inventors: Peter A. Reichert, Govindarajan T. Srinivasan, Joseph F. Wrinn, Michael W. Hamblin
  • Publication number: 20090218498
    Abstract: According to one embodiment, a system for linearizing image data corresponding to one or more objects and output by an imaging device is provided. The system includes a processor configured for: receiving the image data from the imaging device; and producing a generally linear relationship between the image data and a thickness of the one or more objects. The generally linear relationship is produced according to the equation I = I o ? ? - ? l ? l . I is an intensity of the image data, I0 is an intensity of energy produced by the imaging device for outputting the image data, ? is an attenuation coefficient of the one or more objects, and l is the thickness of the one or more objects.
    Type: Application
    Filed: August 18, 2008
    Publication date: September 3, 2009
    Inventors: Peter A. Reichert, Govindarajan T. Srinivasan, Joseph F. Wrinn, Michael W. Hamblin
  • Publication number: 20090218480
    Abstract: According to one embodiment, a calibration system for calibrating image data produced by an imaging system is provided. The calibration system includes a processor configured for: receiving the image data from the imaging system; receiving a plurality of reference values from the imaging system; and calibrating the image data using the reference values. The reference values correspond to air image data produced by the imaging system.
    Type: Application
    Filed: August 18, 2008
    Publication date: September 3, 2009
    Inventors: Govindarajan T. SRINIVASAN, Peter A. Reichert, Michael W. Hamblin, Joseph F. Wrinn, Dennis R. LaFosse
  • Publication number: 20090080764
    Abstract: According to one embodiment, a method for processing one or more X-ray images includes: receiving at least one image of the one or more X-ray images, the one or more X-ray images being of an assembly extending along a plane; based on the at least one image, autonomously determining a respective displacement value for each of portions of the assembly with respect to one or more directions of the plane, each of the displacement values being determined relative to a respective actual value; storing the displacement values; and applying a rule to the stored displacement values, the rule being for determining a defect status of the assembly.
    Type: Application
    Filed: August 12, 2008
    Publication date: March 26, 2009
    Inventors: Govindarajan T. SRINIVASAN, Michael W. HAMBLIN, Joseph F. WRINN, Peter A. REICHERT
  • Patent number: 5631572
    Abstract: An apparatus and method are disclosed for testing connections between printed circuit boards and components mounted thereon. A conductive loop is formed by forward biasing a parasitic diode that is inherently present between an integrated circuit (IC) lead and the ground plane of the IC. A magnetic field is created by an antenna mounted above the component to be tested. When the antenna is energized by an RF source, a voltage is induced in the conductive loop if the loop is continuous, i.e., if all of the connections are properly made. The voltage in the loop is measured and compared to a selected threshold to produce a pass/fail indication. This tester may be implemented as an improvement to a standard type of "bed-of-nails" printed circuit board tester. The antenna may be implemented as an array of spiral loop antennas, with adjacent antennas producing magnetic fields that are 90 degrees out of phase with each other.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: May 20, 1997
    Assignee: Teradyne, Inc.
    Inventors: Timothy W. Sheen, Jiann-Neng Chen, Stephen A. Cohen, Michael A. Baglino, Joseph F. Wrinn
  • Patent number: 4746855
    Abstract: Relay multiplexer circuitry for making a limited number of test channels connectable to a large number of test pins through relays connected to selected test channel nodes and test pin nodes, each test pin node being connectable to a unique combination of test channel nodes within a group of pin nodes, channel nodes and relays.
    Type: Grant
    Filed: June 26, 1987
    Date of Patent: May 24, 1988
    Assignee: Teradyne, Inc.
    Inventor: Joseph F. Wrinn
  • Patent number: 4660197
    Abstract: Quickly synchronizing adjustable delay circuits for a multiple channel tester by using a timing pulse that has reached the end of a given path in the tester to trigger the following timing pulse of a timing generator, thereby providing oscillating timing pulses having an associated frequency related to the propagation delay associated with the particular path, comparing the associated frequency with a reference frequency and adjusting a delay provided in the path until the associated frequency matches a desired frequency.
    Type: Grant
    Filed: November 1, 1985
    Date of Patent: April 21, 1987
    Assignee: Teradyne, Inc.
    Inventors: Joseph F. Wrinn, Lawrence Heller, Jiann-Neng Chen, Jacqueline N. Brenner
  • Patent number: 4178543
    Abstract: Circuit board analysis system, featuring, in various aspects, a probe having three equally spaced tips to simultaneously contact a straight portion of a mounted IC lead, circuitry to monitor contact between the tips and the lead, use of very low level test signals while the board is powered up, and test signal injection to determine the absolute values of internal IC resistance.
    Type: Grant
    Filed: February 23, 1978
    Date of Patent: December 11, 1979
    Assignee: Teradyne, Inc.
    Inventors: Joseph F. Wrinn, Mark S. Hoffman
  • Patent number: 4176312
    Abstract: Electrical circuitry for measuring low level signals comprising a source of ac signals to be measured, a synchronous detector clocked at the frequency of said ac, and a transformer coupling the source to the detector, improved in that, between the transformer and the detector, there are provided a wideband amplifier for amplifying both the information signal and noise present in the transformer output, followed by a filter having a passband of width intermediate those of the amplifier and the detector and centered on the clock frequency of the detector.
    Type: Grant
    Filed: February 24, 1978
    Date of Patent: November 27, 1979
    Assignee: Teradyne, Inc.
    Inventor: Joseph F. Wrinn
  • Patent number: 4176313
    Abstract: System for analyzing electrical circuit boards, featuring, in various aspects, determining first whether there is an active driver IC on a node by examining absolute values of internal IC resistance; second, if there is an active driver, whether there is an input circuit to internal supply voltage shorting resistance, by examining the ratio of the resistance R.sub.1 of one IC to the combined resistance R.sub.2 of the other ICs on the node; and third, if that type of shorting resistance is not found, whether other shorting resistances are present, by examining the difference between actual and expected node voltage.
    Type: Grant
    Filed: February 24, 1978
    Date of Patent: November 27, 1979
    Assignee: Teradyne, Inc.
    Inventor: Joseph F. Wrinn