Abstract: A modified battery cell for simulating failure conditions includes a multiple layer electrical cell. A transistor having a source, a gate, and a drain is positioned in the cell. A controllable voltage source is provided, joined to the gate and source of the transistor. The transistor source is further joined to a first location within said electrical cell multiple layers, and the transistor drain is electrically joined to a second location within said electrical cell multiple layers. Voltage from the controllable voltage source can reduce resistance between said transistor source and said transistor drain for simulating a fault condition between the first location and the second location.

Abstract: A method for testing an internal short circuits in an electrochemical cell is provided. A transistor is implanted in the cell, and it is electrically connected to a controllable voltage source. The transistor is joined between positive and negative components of the cell. The transistor is maintained at high resistance before start of testing. The voltage source is used to reduce electrical resistance in the transistor to simulate an internal short circuit in the electrochemical cell. Thermal runaway propagation in the cell is measured.