Patents by Inventor Joseph P. Grass

Joseph P. Grass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7808503
    Abstract: A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: October 5, 2010
    Assignee: Apple Inc.
    Inventors: Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt, George Cuan, Stephen L. Dodgen, Emerson S. Fang, Zhaoyu Gong, Thomas Y. Yo, Hengwei Hsu, Sidong Li, Sam Ng, Matthew N. Papakipos, Jason R. Redgrave, Sushma S. Trivedi, Nathan D. Tuck, Shun Wai Go, Lindy Fung, Tuan D. Nguyen, Joseph P. Grass, Bo Hong, Abraham Mammen, Abbas Rashid, Albert Suan-Wei Tsay
  • Patent number: 7167181
    Abstract: A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: January 23, 2007
    Assignee: Apple Computer, Inc.
    Inventors: Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt, George Cuan, Stephen L. Dodgen, Emerson S. Fang, Zhaoyu Gong, Thomas Y. Ho, Hengwei Hsu, Sidong Li, Sam Ng, Matthew N. Papakipos, Jason R. Redgrave, Sushma S. Trivedi, Nathan D. Tuck, Shun Wai Go, Lindy Fung, Tuan D. Nguyen, Joseph P. Grass, Bo Hong, Abraham Mammen, Abbas Rashid, Albert Suan-Wei Tsay
  • Patent number: 7164426
    Abstract: A deferred graphics pipeline processor comprising a texture unit and a texture memory associated with the texture unit. The texture unit applies texture maps stored in the texture memory, to pixel fragments. The textures are MIP-mapped and comprise a series of texture maps at different levels of detail, each map representing the appearance of the texture at a given distance from an eye point. The texture unit performs tri-linear interpolation from the texture maps to produce a texture value for a given pixel fragment that approximates the correct level of detail. The texture memory has texture data stored and accessed in a manner which reduces memory access conflicts and thus improves throughput of said texture unit.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: January 16, 2007
    Assignee: Apple Computer, Inc.
    Inventors: Jerome F. Duluk, Jr., Richard E. Hessel, Joseph P. Grass, Abbas Rashid, Bo Hong, Abraham Mammen
  • Publication number: 20040130552
    Abstract: A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
    Type: Application
    Filed: June 9, 2003
    Publication date: July 8, 2004
    Inventors: Jerome F. Duluk, Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt, George Cuan, Stephen L. Dodgen, Emerson S. Fang, Zhaoyu Gong, Thomas Y. Ho, Hengwei Hsu, Sidong Li, Sam Ng, Matthew N. Papakipos, Jason R. Redgrave, Sushma S. Trivedi, Nathan D. Tuck, Shun Wai Go, Lindy Fung, Tuan D. Nguyen, Joseph P. Grass, Bo Hong, Abraham Mammen, Abbas Rashid, Albert Suan-Wei Tsay
  • Patent number: 6717576
    Abstract: A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple-stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: April 6, 2004
    Assignee: Apple Computer, Inc.
    Inventors: Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt, George Cuan, Stephen L. Dodgen, Emerson S. Fang, Zhaoyu Gong, Thomas Y. Ho, Hengwei Hsu, Sidong Li, Sam Ng, Matthew N. Papakipos, Jason R. Redgrave, Sushma S. Trivedi, Nathan D. Tuck, Shun Wai Go, Lindy Fung, Tuan D. Nguyen, Joseph P. Grass, Bo Hong, Abraham Mammen, Abbas Rashid, Albert Suan-Wei Tsay
  • Patent number: 6288730
    Abstract: A deferred graphics pipeline processor comprising a texture unit and a texture memory associated with the texture unit. The texture unit applies texture maps stored in the texture memory, to pixel fragments. The textures are MIP-mapped and comprise a series of texture maps at different levels of detail, each map representing the appearance of the texture at a given distance from an eye point. The texture unit performs tri-linear interpolation from the texture maps to produce a texture value for a given pixel fragment that approximates the correct level of detail. The texture memory has texture data stored and accessed in a manner which reduces memory access conflicts and thus improves throughput of said texture unit.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: September 11, 2001
    Assignee: Apple Computer, Inc.
    Inventors: Jerome F. Duluk, Jr., Richard E. Hessel, Joseph P. Grass, Abbas Rashid, Bo Hong, Abraham Mammen