Patents by Inventor Joseph S. Friedman
Joseph S. Friedman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11977970Abstract: The present disclosure provides a domain wall magnetic tunnel junction device. Integration of input spikes pushes a domain wall within a ferromagnetic track toward a magnetic tunnel junction (MTJ). An energy gradient within the track pushes the domain wall away from the MTJ by leaking accumulated energy from the input spikes. If the integrated input spikes exceed the energy leak of the gradient within a specified time period, the domain wall reaches the MTJ and reverses its resistance, producing an output spike. The leaking energy gradient can be created by a magnetic field, a trapezoidal shape of the ferromagnetic track, or nonuniform material properties in the ferromagnetic track. A feedback and feedforward crossbar configuration is disclosed that provides for a neuromorphic computing system suitable for unsupervised learning.Type: GrantFiled: March 24, 2021Date of Patent: May 7, 2024Assignee: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Wesley H. Brigner, Naimul Hassan, Xuan Hu, Alvaro Velasquez
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Patent number: 11942129Abstract: A magnetic tunnel junction is provided. The magnetic tunnel junction comprises an insulating tunnel barrier and a fixed ferromagnet layer adjacent the tunnel barrier. The fixed ferromagnet comprises a fixed magnetization along an easy axis approximately normal to an interface between the fixed ferromagnet and the tunnel barrier. A free ferromagnet layer is adjacent the tunnel barrier on the side opposite the fixed ferromagnet. The free ferromagnet layer comprises a bistable magnetization along the easy axis that can switch between a parallel state and an anti-parallel state with the fixed ferromagnet. A heavy metal layer is adjacent the free ferromagnet on the side opposite the tunnel barrier. A unidirectional electric current pulse through the heavy metal layer switches the bistable magnetization of the free ferromagnet, thereby switching an electrical resistance state of the magnetic tunnel junction.Type: GrantFiled: April 30, 2020Date of Patent: March 26, 2024Assignee: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Naimul Hassan
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Patent number: 11539365Abstract: A skyrmion logic gate is provided. The logic gate comprises a first track configured for propagation of magnetic skyrmions and a second track configured for propagation of magnetic skyrmions. A junction links the first and second tracks. A continuous current flows through the logic gate, wherein skyrmions propagate due to the current.Type: GrantFiled: June 29, 2020Date of Patent: December 27, 2022Assignee: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Xuan Hu, Maverick Alisier Mathis Chauwin
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Publication number: 20220395217Abstract: Systems and methods to detect seizures using analog circuitry. One example method generally includes obtaining, at a seizure detection system, one or more electroencephalogram (EEG) signals, detecting a plurality of features associated with each of the one or more EEG signals, generating a bitstream indicating a seizure probability associated with each feature of the plurality of features to yield a plurality of bitstreams indicating a plurality of seizure probabilities, and generating a seizure detection output based on the plurality of bitstreams indicating the plurality of seizure probabilities of the plurality of features.Type: ApplicationFiled: June 10, 2022Publication date: December 15, 2022Applicant: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Mehrdad Nourani, Hina Dave, Alexander J. Edwards, Xuan Hu, Abbas A. Zaki, Noah C. Parker, Jay H. Harvey, TaeYoon Kim
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Patent number: 11514301Abstract: The present disclosure provides a domain wall magnetic tunnel junction device. Integration of input spikes pushes a domain wall within a ferromagnetic track toward a magnetic tunnel junction (MTJ). An energy gradient within the track pushes the domain wall away from the MTJ by leaking accumulated energy from the input spikes. If the integrated input spikes exceed the energy leak of the gradient within a specified time period, the domain wall reaches the MTJ and reverses its resistance, producing an output spike. The leaking energy gradient can be created by a magnetic field, a trapezoidal shape of the ferromagnetic track, or nonuniform material properties in the ferromagnetic track.Type: GrantFiled: January 29, 2020Date of Patent: November 29, 2022Assignee: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Wesley H. Brigner, Naimul Hassan, Xuan Hu
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Publication number: 20220208242Abstract: A magnetic tunnel junction is provided. The magnetic tunnel junction comprises an insulating tunnel barrier and a fixed ferromagnet layer adjacent the tunnel barrier. The fixed ferromagnet comprises a fixed magnetization along an easy axis approximately normal to an interface between the fixed ferromagnet and the tunnel barrier. A free ferromagnet layer is adjacent the tunnel barrier on the side opposite the fixed ferromagnet. The free ferromagnet layer comprises a bistable magnetization along the easy axis that can switch between a parallel state and an anti-parallel state with the fixed ferromagnet. A heavy metal layer is adjacent the free ferromagnet on the side opposite the tunnel barrier. A unidirectional electric current pulse through the heavy metal layer switches the bistable magnetization of the free ferromagnet, thereby switching an electrical resistance state of the magnetic tunnel junction.Type: ApplicationFiled: April 30, 2020Publication date: June 30, 2022Inventors: Joseph S. Friedman, Naimul Hassan
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Publication number: 20210232903Abstract: The present disclosure provides a domain wall magnetic tunnel junction device. Integration of input spikes pushes a domain wall within a ferromagnetic track toward a magnetic tunnel junction (MTJ). An energy gradient within the track pushes the domain wall away from the MTJ by leaking accumulated energy from the input spikes. If the integrated input spikes exceed the energy leak of the gradient within a specified time period, the domain wall reaches the MTJ and reverses its resistance, producing an output spike. The leaking energy gradient can be created by a magnetic field, a trapezoidal shape of the ferromagnetic track, or nonuniform material properties in the ferromagnetic track. A feedback and feedforward crossbar configuration is disclosed that provides for a neuromorphic computing system suitable for unsupervised learning.Type: ApplicationFiled: March 24, 2021Publication date: July 29, 2021Inventors: Joseph S. Friedman, Wesley H. Brigner, Naimul Hassan, Xuan Hu, Alvaro Velasquez
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Publication number: 20200412366Abstract: A skyrmion logic gate is provided. The logic gate comprises a first track configured for propagation of magnetic skyrmions and a second track configured for propagation of magnetic skyrmions. A junction links the first and second tracks. A continuous current flows through the logic gate, wherein skyrmions propagate due to the current.Type: ApplicationFiled: June 29, 2020Publication date: December 31, 2020Applicant: Board of Regents, The University of Texas SystemInventors: Joseph S. Friedman, Xuan Hu, Maverick Alisier Mathis Chauwin
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Publication number: 20200242462Abstract: The present disclosure provides a domain wall magnetic tunnel junction device. Integration of input spikes pushes a domain wall within a ferromagnetic track toward a magnetic tunnel junction (MTJ). An energy gradient within the track pushes the domain wall away from the MTJ by leaking accumulated energy from the input spikes. If the integrated input spikes exceed the energy leak of the gradient within a specified time period, the domain wall reaches the MTJ and reverses its resistance, producing an output spike. The leaking energy gradient can be created by a magnetic field, a trapezoidal shape of the ferromagnetic track, or nonuniform material properties in the ferromagnetic track.Type: ApplicationFiled: January 29, 2020Publication date: July 30, 2020Inventors: Joseph S. Friedman, Wesley H. Brigner, Naimul Hassan, Xuan Hu
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Patent number: 10594319Abstract: A logic gate and a cascaded logic family is described that uses the unique ambipolar behavior, e.g., of carbon nanotubes. A complementary VT-drop ambipolar carbon nanotube logic can provide a decrease in device count compared to previous ambipolar carbon nanotube field effect transistor logic structures, enabling power and/or speed improvements.Type: GrantFiled: May 10, 2017Date of Patent: March 17, 2020Assignee: Northwestern UniversityInventors: Joseph S. Friedman, Michael L. Geier, Mark C. Hersam, Alan V. Sahakian
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Publication number: 20190013810Abstract: A logic gate and a cascaded logic family is described that uses the unique ambipolar behavior, e.g., of carbon nanotubes. A complementary VT-drop ambipolar carbon nanotube logic can provide a decrease in device count compared to previous ambipolar carbon nanotube field effect transistor logic structures, enabling power and/or speed improvements.Type: ApplicationFiled: May 10, 2017Publication date: January 10, 2019Inventors: Joseph S. Friedman, Michael L. Geier, Mark C. Hersam, Alan V. Sahakian
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Patent number: 10002964Abstract: An electrostatically formed nanowire transistor, includes a source, a drain, and multiple gates surrounding a doped silicon region. The gates include a top gate, a bottom gate, and side gates. The gates induce a channel in said doped silicon region. The channel has a width which is decreased by negative biasing of the side gates, and a height and vertical position controlled by the top and bottom gates.Type: GrantFiled: July 7, 2017Date of Patent: June 19, 2018Assignee: Northwestern UniversityInventors: Joseph S. Friedman, Alan V. Sahakian, Andrey Godkin, Alex Henning, Yossi Rosenwaks
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Publication number: 20170309747Abstract: An electrostatically formed nanowire transistor, includes a source, a drain, and multiple gates surrounding a doped silicon region. The gates include a top gate, a bottom gate, and side gates. The gates induce a channel in said doped silicon region. The channel has a width which is decreased by negative biasing of the side gates, and a height and vertical position controlled by the top and bottom gates.Type: ApplicationFiled: July 7, 2017Publication date: October 26, 2017Inventors: Joseph S. Friedman, Alan V. Sahakian, Andrey Godkin, Alex Henning, Yossi Rosenwaks
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Patent number: 9780791Abstract: A switch comprising a spin-transistor and a first control wire. The spin-transistor is configured so that when a magnetic field applied to the spin-transistor is less than a threshold value, the transistor is in a conductive state in which electric current flows through the spin-transistor. When the magnetic field applied to the spin-transistor is greater than the threshold value, the spin-transistor is in a resistive state in which the electric current flowing through the spin-transistor is substantially reduced. The first control wire is for receiving a current to affect the magnetic field applied to the spin-transistor.Type: GrantFiled: January 18, 2016Date of Patent: October 3, 2017Assignee: Northwestern UniversityInventors: Joseph S. Friedman, Gokhan Memik, Bruce W. Wessels
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Patent number: 9728636Abstract: An electrostatically formed nanowire transistor, includes a source, a drain, and multiple gates surrounding a doped silicon region. The gates include a top gate, a bottom gate, and side gates. The gates induce a channel in said doped silicon region. The channel has a width which is decreased by negative biasing of the side gates, and a height and vertical position controlled by the top and bottom gates.Type: GrantFiled: March 30, 2015Date of Patent: August 8, 2017Assignees: NORTHWESTERN UNIVERSITY, RAMOT AT TEL AVIV UNIVERSITY LTD.Inventors: Joseph S. Friedman, Alan V. Sahakian, Andrey Godkin, Alex Henning, Yossi Rosenwaks
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Publication number: 20160134287Abstract: A switch comprising a spin-transistor and a first control wire. The spin-transistor is configured so that when a magnetic field applied to the spin-transistor is less than a threshold value, the transistor is in a conductive state in which electric current flows through the spin-transistor. When the magnetic field applied to the spin-transistor is greater than the threshold value, the spin-transistor is in a resistive state in which the electric current flowing through the spin-transistor is substantially reduced. The first control wire is for receiving a current to affect the magnetic field applied to the spin-transistor.Type: ApplicationFiled: January 18, 2016Publication date: May 12, 2016Inventors: Joseph S. Friedman, Gokhan Memik, Bruce W. Wessels
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Patent number: 9270277Abstract: An emitter-coupled spin-transistor includes an emitter, a collector and a base. A first control wire receives an input current to create a magnetic field that affects amplification of the spin-transistor. A second transistor also includes an emitter, a collector and a base, where the emitter of the second transistor is coupled to the emitter of the spin-transistor to provide a logic circuit.Type: GrantFiled: June 28, 2013Date of Patent: February 23, 2016Assignee: Northwestern UniversityInventors: Joseph S. Friedman, Gokhan Memik, Bruce W. Wessels
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Patent number: 9186103Abstract: Systems and methods can perform automatic computation developed using carbon nanotubes and graphene nanoribbons and/or InSb p-n bilayer channel avalanche diodes and wires. Spin logic can provide improvements in speed, power, and area, promising to be a high-performance logic family for the next generation of computing. The systems and methods can replace CMOS, for example, for general computing applications.Type: GrantFiled: June 6, 2014Date of Patent: November 17, 2015Assignee: NORTHWESTERN UNIVERSITYInventors: Joseph S. Friedman, Bruce W. Wessels, Alan V. Sahakian
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Publication number: 20150279990Abstract: An electrostatically formed nanowire transistor, includes a source, a drain, and multiple gates surrounding a doped silicon region. The gates include a top gate, a bottom gate, and side gates. The gates induce a channel in said doped silicon region. The channel has a width which is decreased by negative biasing of the side gates, and a height and vertical position controlled by the top and bottom gates.Type: ApplicationFiled: March 30, 2015Publication date: October 1, 2015Inventors: Joseph S. Friedman, Alan V. Sahakian, Andrey Godkin, Alex Henning, Yossi Rosenwaks
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Patent number: 8912821Abstract: In one aspect, the invention relates to logic cells that utilize one or more of spin diodes. By placing one or two control wires on the side of the spin diodes to generate magnetic fields in the spin diodes due to input currents, the logic cell can be changed from one logic gate to another logic gate. The unique feature leads to field logic devices in which simple instructions can be used to construct a whole new set of logic gates.Type: GrantFiled: October 22, 2012Date of Patent: December 16, 2014Assignee: Northwestern UniversityInventors: Joseph S. Friedman, Nikhil Rangaraju, Yehea Ismail, Bruce W. Wessels