Patents by Inventor Joseph Shor

Joseph Shor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985260
    Abstract: A method for creating a physical unclonable function (PUF) bit for use with transistor circuitry includes performing a tilt test on a PUF cell of a transistor circuitry, comprising tilting the PUF cell at least once, and comparing a mismatch of a response of the PUF cell to a tilt threshold. A magnitude of the mismatch is determined. A mismatch magnitude below the tilt threshold is considered a first logic value” and a mismatch magnitude above the tilt threshold is considered a second logic value. The mismatch magnitude of the PUF cell is random. The absolute value of the mismatch magnitude is used as an entropy source to produce at least one PUF bit called a mirror PUF bit.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: May 14, 2024
    Inventors: Yitzhak Schifmann, Joseph Shor
  • Publication number: 20240053386
    Abstract: A method for measuring voltage droop and temperature in a circuit include using capacitive coupling to couple a bias voltage of a current controlled oscillator (CCO) to a noisy digital Vcc (VCCD) supply, so that a frequency of the CCO is independent of a DC Vcc level of the noisy VCCD supply and the CCO measures an AC voltage droop of the noisy VCCD supply and a temperature which is dependent upon the AC voltage droop.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 15, 2024
    Applicant: Bar Ilan University
    Inventors: Joseph Shor, Amir Mizrahi, Gil Golan, Orel Dahaman, Omer Nechushtan
  • Publication number: 20220166431
    Abstract: A technique to mitigate timing errors induced by power supply droops includes an inverter-based droop detector as well as Dual Mode Logic (DML) to achieve a droop-resist ant timing response. The droop detector is based on capacitor ratios and is thus less sensitive to Process/Voltage/Temperature (PVT) and to random offset than the prior art. The DML can alter its power/performance ratio based on the droop level input it receives from the detector, such that the critical timings are preserved.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 26, 2022
    Applicant: Bar Ilan University
    Inventors: Joseph Shor, Yitzhak Schifmann, Inbal Stanger, Netanel Shavit, Edison Ramiro Taco Lasso, Alexander Fish
  • Publication number: 20220131713
    Abstract: A method for creating a physical unclonable function (PUF) bit for use with transistor circuitry includes performing a tilt test on a PUF cell of a transistor circuitry, comprising tilting the PUF cell at least once, and comparing a mismatch of a response of the PUF cell to a tilt threshold. A magnitude of the mismatch is determined. A mismatch magnitude below the tilt threshold is considered a first logic value” and a mismatch magnitude above the tilt threshold is considered a second logic value. The mismatch magnitude of the PUF cell is random. The absolute value of the mismatch magnitude is used as an entropy source to produce at least one PUF bit called a mirror PUF bit.
    Type: Application
    Filed: October 20, 2021
    Publication date: April 28, 2022
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Yitzhak Schifmann, Joseph Shor
  • Patent number: 11112816
    Abstract: A sensor circuit includes a bandgap reference circuit (BGREF) that produces two outputs, a temperature dependent output and a reference voltage, which does not change with temperature. The temperature dependent output includes a PTAT (proportional to absolute temperature, rising with increased temperature) portion and a CTAT (complementary to absolute temperature, falling with increased temperature) portion. Circuitry is provided that calculates the reference voltage by adding the PTAT portion and a divided version of the CTAT portion in which the CTAT portion has been divided by a divisor.
    Type: Grant
    Filed: April 22, 2018
    Date of Patent: September 7, 2021
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Ori Bass, Joseph Shor
  • Patent number: 11114352
    Abstract: A process monitor circuitry is described that can measure the electron mobility (?), oxide capacitance (Cox) and threshold voltage (Vth) of an integrated circuit.
    Type: Grant
    Filed: August 25, 2019
    Date of Patent: September 7, 2021
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Joseph Shor, Liron Lisha
  • Patent number: 10999083
    Abstract: A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: May 4, 2021
    Assignee: Birad—Research & Development Corapany Ltd.
    Inventors: Joseph Shor, Yoav Weizman, Yitzhak Schifmann
  • Patent number: 10998889
    Abstract: A sensor circuit includes at least one ring oscillator having a supply port supplied by at least one current source and a reference frequency. A comparator compares a frequency output of the at least one ring oscillator with the reference frequency to yield a measurement, such as a temperature measurement.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: May 4, 2021
    Assignee: Birad-Research & Development Company Ltd.
    Inventors: Joseph Shor, Natan Vinshtok-Melnik
  • Publication number: 20210057294
    Abstract: A process monitor circuitry is described that can measure the electron mobility (?), oxide capacitance (Cox) and threshold voltage (Vth) of an integrated circuit.
    Type: Application
    Filed: August 25, 2019
    Publication date: February 25, 2021
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Joseph Shor, Liron Lisha
  • Patent number: 10871404
    Abstract: A thermal sensor includes a first resistor and a first capacitor. The first resistor is a thermistor. A first current source is coupled to the first resistor and the first capacitor. The first current source alternately charges the first resistor and the first capacitor each to a reference voltage, Vtherm. An output of the thermal sensor is a function of a resistance-capacitance (RC) time constant of the first resistor and the first capacitor.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: December 22, 2020
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Anatoli Mordakhay, Joseph Shor
  • Patent number: 10852756
    Abstract: Described is an apparatus which comprises: a first power supply node to supply input power supply; a power transistor coupled to the first power supply node; a multiplexer to selectively control gate terminal of the power transistor according to whether the power transistor is to operate as part of a low dropout voltage regulator (LDO-VR) or is to operate as a digital switch; and a second power supply node coupled to the power transistor, the second power supply node to provide power supply to a load from the power transistor.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: Kosta Luria, Alexander Lyakhov, Joseph Shor, Michael Zelikson
  • Patent number: 10848327
    Abstract: A method for detecting unreliable bits in transistor circuitry includes adjusting a value of a variable capacitor coupled to a physical unclonable function (PUF) cell of a transistor circuit. The adjusting includes tilting the PUF cell to either a zero or one state: if the PUF cell changes its state during the tilting it is deemed unstable, and if the PUF cell does not change its state during the tilting it is deemed stable.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: November 24, 2020
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Yitzhak Shifman, Avi Miller, Joseph Shor
  • Patent number: 10630493
    Abstract: A physical unclonable function (PUF) array includes a plurality of PUF transistor cells each of which includes at least one inverter. An input and an output of the at least one inverter are shorted to a first reference node. There is adjustment circuitry for adjusting a reference voltage of the first reference node, and measurement circuitry for measuring a trip point of the at least one inverter. If the trip point is close to the reference voltage then bits of the at least one inverter are defined as unstable.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: April 21, 2020
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Joseph Shor, Roi Levi, Yoav Weizman
  • Publication number: 20200092117
    Abstract: A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.
    Type: Application
    Filed: November 20, 2019
    Publication date: March 19, 2020
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Joseph Shor, Yoav Weizman, Yitzhak Schifmann
  • Publication number: 20200007350
    Abstract: A method for detecting unreliable bits in transistor circuitry includes adjusting a value of a variable capacitor coupled to a physical unclonable function (PUF) cell of a transistor circuit. The adjusting includes tilting the PUF cell to either a zero or one state: if the PUF cell changes its state during the tilting it is deemed unstable, and if the PUF cell does not change its state during the tilting it is deemed stable.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Yitzhak Shifman, Avi Miller, Joseph Shor
  • Publication number: 20190353534
    Abstract: A thermal sensor includes a first resistor and a first capacitor. The first resistor is a thermistor. A first current source is coupled to the first resistor and the first capacitor. The first current source alternately charges the first resistor and the first capacitor each to a reference voltage, Vtherm. An output of the thermal sensor is a function of a resistance-capacitance (RC) time constant of the first resistor and the first capacitor.
    Type: Application
    Filed: May 16, 2018
    Publication date: November 21, 2019
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Anatoli Mordakhay, Joseph Shor
  • Publication number: 20190324490
    Abstract: A sensor circuit includes a bandgap reference circuit (BGREF) that produces two outputs, a temperature dependent output and a reference voltage, which does not change with temperature. The temperature dependent output includes a PTAT (proportional to absolute temperature, rising with increased temperature) portion and a CTAT (complementary to absolute temperature, falling with increased temperature) portion. Circuitry is provided that calculates the reference voltage by adding the PTAT portion and a divided version of the CTAT portion in which the CTAT portion has been divided by a divisor.
    Type: Application
    Filed: April 22, 2018
    Publication date: October 24, 2019
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Ori Bass, Joseph Shor
  • Publication number: 20190199329
    Abstract: A sensor circuit includes at least one ring oscillator having a supply port supplied by at least one current source and a reference frequency. A comparator compares a frequency output of the at least one ring oscillator with the reference frequency to yield a measurement, such as a temperature measurement.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Applicant: Bar Ilan University
    Inventors: Joseph Shor, Natan Vinshtok-Melnik
  • Publication number: 20190165953
    Abstract: A physical unclonable function (PUF) array includes a plurality of PUF transistor cells each of which includes at least one inverter. An input and an output of the at least one inverter are shorted to a first reference node. There is adjustment circuitry for adjusting a reference voltage of the first reference node, and measurement circuitry for measuring a trip point of the at least one inverter. If the trip point is close to the reference voltage then bits of the at least one inverter are defined as unstable.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 30, 2019
    Applicant: Bar Ilan University
    Inventors: Joseph Shor, Roi Levi, Yoav Weizman
  • Publication number: 20190074984
    Abstract: A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.
    Type: Application
    Filed: September 3, 2017
    Publication date: March 7, 2019
    Applicant: BAR-ILAN UNIVERSITY
    Inventors: Joseph Shor, Yoav Weizman, Yitzhak Schifmann