Patents by Inventor Joshua D. Karnes

Joshua D. Karnes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9971620
    Abstract: Methods and systems for network packet impairment within virtual machine (VM) host systems are disclosed that provide virtual impairment processors within VM host hardware systems. One or more processing devices within a virtual machine (VM) host system are operated to provide at least one virtual machine (VM) platform, a virtual switch, and a virtual impairment processor within a virtualization layer for the VM host system. Network packets associated with packet traffic for the at least one VM platform using the virtual switch. The virtual impairment processor then applies one or more impairments to the network packets such as a drop, modify, delay, and/or other packet impairment. The impaired packets are then forwarded by the virtual switch to target destinations for the impaired network packets using the virtual switch.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: May 15, 2018
    Assignee: Keysight Technologies Singapore (Holdings) PTE LTD
    Inventor: Joshua D. Karnes
  • Patent number: 9971619
    Abstract: Methods and systems for forwarding network packets within virtual machine (VM) host systems are disclosed that provide virtual packet brokers and related virtual test access ports (TAPs) within VM host hardware systems. One or more processing devices are operated to provide a virtual machine (VM) platform, virtual test access port(s) (TAPs), and a virtual packet broker within a virtualization layer. Network packets are then received using the virtual TAPs and copied network packets are sent from the virtual TAPs to the virtual packet broker. The virtual packet broker applies packet content filter(s) to the copied network packets to determine selected packets within the copied network packets to forward to virtual and/or external network packet analysis tool(s). Virtual switches can also be provided within the virtualization layer to forward packets among a plurality of VM platforms and/or external networks.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: May 15, 2018
    Assignee: Keysight Technologies Singapore (Holdings) PTE LTD
    Inventor: Joshua D. Karnes
  • Patent number: 9491727
    Abstract: Systems and methods are disclosed for monitoring network synchronization. The disclosed embodiments utilize time window snapshots to capture network time information and compare the captured time information against time reference information to determine network time errors. These network time errors can then be analyzed with respect to selected operating parameters and tolerances to determine network synchronization errors and to generate alarms. Certain embodiments are configured to capture time information data and to analyze this captured data locally to determine time error data. Certain other embodiments are configured to utilize multiple capture devices and to transmit time error data to a central snapshot synchronization monitor. The central snapshot synchronization monitor can also communicate control information to the capture devices to control the snapshot time windows.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: November 8, 2016
    Assignee: Anue Systems, Inc.
    Inventors: Charles A. Webb, III, Jason C. Nutt, Simon A. Mackenzie, Joshua D. Karnes
  • Patent number: 9344265
    Abstract: Network timing synchronization for virtual machine (VM) host systems and related methods are disclosed that provide synchronization of master/slave clocks within VM host hardware systems. Master timing messages are sent from the master clocks to slave clocks within VM guest platforms hosted by the VM host hardware system within a virtualization layer, and return slave timing messages are communicated from the VM guest platforms to the master clock. Virtual switches within the virtualization layer use virtual transparent clocks to determine intra-switch delay times for the timing packets traversing the virtual switch. These intra-switch delay times are then communicated to target destinations and used to account for variations in packet transit times through the virtual switch. The VM guest platforms synchronize their timing using the timing messages. The master/slave timing messages can be PTP (Precision Time Protocol) timing messages and/or timing messages based upon some other timing protocol.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: May 17, 2016
    Assignee: Anue Systems, Inc.
    Inventor: Joshua D. Karnes
  • Publication number: 20160110212
    Abstract: Methods and systems for network packet impairment within virtual machine (VM) host systems are disclosed that provide virtual impairment processors within VM host hardware systems. One or more processing devices within a virtual machine (VM) host system are operated to provide at least one virtual machine (VM) platform, a virtual switch, and a virtual impairment processor within a virtualization layer for the VM host system. Network packets associated with packet traffic for the at least one VM platform using the virtual switch. The virtual impairment processor then applies one or more impairments to the network packets such as a drop, modify, delay, and/or other packet impairment. The impaired packets are then forwarded by the virtual switch to target destinations for the impaired network packets using the virtual switch.
    Type: Application
    Filed: October 15, 2014
    Publication date: April 21, 2016
    Inventor: Joshua D. Karnes
  • Publication number: 20160110211
    Abstract: Methods and systems for forwarding network packets within virtual machine (VM) host systems are disclosed that provide virtual packet brokers and related virtual test access ports (TAPs) within VM host hardware systems. One or more processing devices are operated to provide a virtual machine (VM) platform, virtual test access port(s) (TAPs), and a virtual packet broker within a virtualization layer. Network packets are then received using the virtual TAPs and copied network packets are sent from the virtual TAPs to the virtual packet broker. The virtual packet broker applies packet content filter(s) to the copied network packets to determine selected packets within the copied network packets to forward to virtual and/or external network packet analysis tool(s). Virtual switches can also be provided within the virtualization layer to forward packets among a plurality of VM platforms and/or external networks.
    Type: Application
    Filed: October 15, 2014
    Publication date: April 21, 2016
    Inventor: Joshua D. Karnes
  • Publication number: 20160112182
    Abstract: Network timing synchronization for virtual machine (VM) host systems and related methods are disclosed that provide synchronization of master/slave clocks within VM host hardware systems. Master timing messages are sent from the master clocks to slave clocks within VM guest platforms hosted by the VM host hardware system within a virtualization layer, and return slave timing messages are communicated from the VM guest platforms to the master clock. Virtual switches within the virtualization layer use virtual transparent clocks to determine intra-switch delay times for the timing packets traversing the virtual switch. These intra-switch delay times are then communicated to target destinations and used to account for variations in packet transit times through the virtual switch. The VM guest platforms synchronize their timing using the timing messages. The master/slave timing messages can be PTP (Precision Time Protocol) timing messages and/or timing messages based upon some other timing protocol.
    Type: Application
    Filed: October 15, 2014
    Publication date: April 21, 2016
    Inventor: Joshua D. Karnes
  • Publication number: 20150071308
    Abstract: Systems and methods are disclosed for monitoring network synchronization. The disclosed embodiments utilize time window snapshots to capture network time information and compare the captured time information against time reference information to determine network time errors. These network time errors can then be analyzed with respect to selected operating parameters and tolerances to determine network synchronization errors and to generate alarms. Certain embodiments are configured to capture time information data and to analyze this captured data locally to determine time error data. Certain other embodiments are configured to utilize multiple capture devices and to transmit time error data to a central snapshot synchronization monitor. The central snapshot synchronization monitor can also communicate control information to the capture devices to control the snapshot time windows.
    Type: Application
    Filed: September 10, 2013
    Publication date: March 12, 2015
    Applicant: Anue Systems, Inc.
    Inventors: Charles A. Webb, III, Jason C. Nutt, Simon A. Mackenzie, Joshua D. Karnes
  • Patent number: 6873243
    Abstract: A method and an apparatus for protecting an electrical circuit against excessive currents by a fuse assembly. The fuse assembly is configured to interrupt the flow of current through the electrical circuit by increasing dielectric separation between two ends of a fuse element prepared in a form substantially representing a curve. The fuse element is coupled to a pair of conductive endcaps and a dielectric material substantially encloses the fuse element between the endcaps. The method of increasing dielectric separation between two ends of a fuse element includes preparing the fuse element in the form substantially representing the curve, coupling the fuse element between a pair of conductive endcaps, and enclosing the fuse element in a dielectric material which is formed such that a portion of the dielectric material extends into the area bounded by the fuse element and a line intersecting the two ends of the fuse element.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: March 29, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: Joshua D. Karnes, Martin Lindquist, Louis E. Fischer
  • Patent number: 6839383
    Abstract: A method for testing the frequency response of a communication device that when operated determines a signal-to-noise ratio for a plurality of frequency bands includes receiving a signal-to-noise ratio generated by the communication device for each of the plurality of frequency bands. The method also includes receiving the amount of noise at each of the plurality of frequency bands, and determining, for each of the plurality of frequency bands, the magnitude of the signal at each of the plurality of frequency bands based on the signal-to-noise ratio and the amount of noise at each frequency band. Thereby the frequency response of the communication device is indeed determined.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: January 4, 2005
    Assignee: Cisco Technology, Inc.
    Inventor: Joshua D. Karnes
  • Patent number: 6600642
    Abstract: A method for lightning protection in a printed circuit board includes providing a printed circuit board having a plurality of conductors for connecting to a plurality of telecommunications lines, surrounding a portion of the conductors with a floating element to induce any lightning received by the conductors to flow to the floating element, and disposing a ground conductor with respect to a portion of the floating element such that lightning will be induced to flow to ground from the floating element.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: July 29, 2003
    Assignee: Cisco Technology, Inc.
    Inventor: Joshua D. Karnes
  • Patent number: 6449171
    Abstract: A method for forming a telecommunications modular cardholder comprises providing a generally flat workpiece; cutting a handle in the workpiece while leaving the handle attached to the workpiece; and forming a front portion from the workpiece. The front portion is substantially perpendicular to a body portion of the workpiece. The front portion and the body portion of the workpiece form a modular face plate. The method also includes bending the handle with respect to the workpiece and the front portion to form a handle facing a desired direction.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: September 10, 2002
    Assignee: Cisco Technology, Inc.
    Inventor: Joshua D. Karnes