Abstract: The present disclosure is directed to an exemplary method for designing, implementing, and making a high capacity low leakage multilayer stack for various electronic applications. In a particular embodiment, the multilayer stack is made up of a dielectric/ferroelectric/dielectric trilayer. This configuration has shown to have giant dielectric permittivity which is much higher than conventional gate dielectrics. The DE/FE interlayer exhibits strong interlayer coupling, yielding desired properties. In order to prevent leakage and loss while maintaining high capacity, certain parameters of each layer must exist. The present disclosure describes a method of quantitatively achieving these parameters through correlating critical fraction with dielectric constant. Moreover, this method can be used for scalability of electronic materials.