Abstract: A method 100, a computer program product and a system of checking an integrated circuit layout for instances of a reference pattern is provided The method 100 comprises the steps of: i) receiving 102 the integrated circuit layout, ii) receiving 104 a drawing of the reference pattern from a user, iii) deducting 106 a basic pattern definition from the drawn reference pattern, iv) determining 108 a set of topological relation based on the drawn reference pattern, v) forming 110 a complex pattern description which is a combination of the deducted basic pattern definition and the set of topological relations, vi) checking 112 the integrated circuit layout for patterns that match the complex pattern description to find instances of the reference pattern in the integrated circuit layout, and vii) storing 114 found instances of the reference pattern.

Abstract: A method for scanning a semiconductor layout, the layout comprising objects with edges and corners, the method comprising identifying locally closest point pairs, identifying a proximity relation between two parallel edges where the parallel edges have at least one locally closest point pair in common and storing the proximity relation in a proximity relations table of a database together with a reference to the corresponding pair of edges. Locally closest point pairs are identified where the first edge and the second edge are not in contact with each other, a distance between the first point and the second point is the shortest distance between the first edge and the second edge, and a convex bounding area with the first point and the second point on its boundary contains no edge.

Abstract: A method for adapting objects of a circuit layout to a predefined grid, wherein the objects are a representation of an integrated circuit, each object being defined by elements including a reference element. A reference element is selected which is unaligned to the predefined grid, and a gridline is selected from the predefined grid. A grid-constraint is generated which is subsequently added to a set of constraints associated with the circuit layout. The set of constraints includes design-rule constraints for applying a design rule to groups of objects of the circuit layout. The objects of the circuit layout are adapted to substantially comply with the set of constraints. Reference elements unaligned to the predefined grid are gridded while compliance of the circuit layout with the design rules is maintained.

Abstract: The invention relates to a layout modification engine (18) for modifying a circuit layout (1) comprising layout entities including a fixed layout entity and free layout entities. The layout entities are a representation of at least part of an integrated circuit, each layout entity comprises at least one layout element. The fixed layout entity is restrained to a predefined position. The layout modification engine comprises the conflict-solver for resolving conflicts between the fixed layout entity and the free layout entities. The conflict-solver comprises a layout analyzer (14) and a conflict-solving-module (16). The conflict-solving module generates a set of fixed layout elements for resolving the detected conflict. Because the layout modification engine converts the fixed layout entity into the set of fixed layout elements, the layout modification engine will encounter less conflict situations while modifying the circuit layout which reduces the processing time.

Abstract: A method for scanning a semiconductor layout, the layout comprising objects with edges and corners, the method comprising identifying locally closest point pairs, identifying a proximity relation between two parallel edges where the parallel edges have at least one locally closest point pair in common and storing the proximity relation in a proximity relations table of a database together with a reference to the corresponding pair of edges. Locally closest point pairs are identified where the first edge and the second edge are not in contact with each other, a distance between the first point and the second point is the shortest distance between the first edge and the second edge, and a convex bounding area with the first point and the second point on its boundary contains no edge.