Patents by Inventor Jriyan Jerry Chen
Jriyan Jerry Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220209188Abstract: Embodiments of the present disclosure generally relate to an organic light emitting diode device, and more particularly, to moisture barrier films utilized in an OLED device. The OLED device comprises a thin film encapsulation structure and/or a thin film transistor. A moisture barrier film is used as a first barrier layer in the thin film encapsulation structure and as a passivation layer and/or a gate insulating layer in the thin film transistor. The moisture barrier film comprises a silicon oxynitride material having a low refractive index of less than about 1.5, a low water vapor transmission rate of less than about 5.0×10?5 g/m2/day, and low hydrogen content of less than about 8%.Type: ApplicationFiled: July 10, 2019Publication date: June 30, 2022Inventors: Wen-Hao WU, Jriyan Jerry CHEN, Dong Kil YIM
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Patent number: 8076222Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.Type: GrantFiled: September 4, 2008Date of Patent: December 13, 2011Assignee: Applied Materials, Inc.Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
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Patent number: 7955890Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.Type: GrantFiled: June 17, 2009Date of Patent: June 7, 2011Assignee: Applied Materials, Inc.Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
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Patent number: 7833885Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.Type: GrantFiled: November 26, 2008Date of Patent: November 16, 2010Assignee: Applied Materials, Inc.Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
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Publication number: 20100089319Abstract: A method and apparatus having a RF return path with low impedance coupling a substrate support to a chamber wall in a plasma processing system is provided. In one embodiment, a processing chamber includes a chamber body having a chamber sidewall, a bottom and a lid assembly supported by the chamber sidewall defining a processing region, a substrate support disposed in the processing region of the chamber body, a shadow frame disposed on an edge of the substrate support assembly, and a RF return path having a first end coupled to the shadow frame and a second end coupled to the chamber sidewall.Type: ApplicationFiled: October 9, 2009Publication date: April 15, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Carl A. Sorensen, John M. White, Jozef Kudela, Jonghoon Baek, Jriyan Jerry Chen, Steve McPherson, Soo Young Choi, Robin L. Tiner
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Publication number: 20090315030Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.Type: ApplicationFiled: June 17, 2009Publication date: December 24, 2009Applicant: APPLIED MATERIALS, INC.Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
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Publication number: 20090200551Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.Type: ApplicationFiled: September 4, 2008Publication date: August 13, 2009Inventors: Tae Kyung Won, Soo Young Chol, Dong-Kil Yim, Jriyan Jerry Chen
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Publication number: 20090200552Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.Type: ApplicationFiled: November 26, 2008Publication date: August 13, 2009Applicant: APPLIED MATERIALS, INC.Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
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Publication number: 20080138974Abstract: A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at least 2 wt % silicon and preferably less than 20 wt %. An adhesion layer may be formed between the barrier layer and the bonding pad. For copper metallization, the adhesion layer may contain titanium or tantalum; for aluminum metallization, it may be aluminum. The nickel silicon alloy may be deposited by magnetron sputtering. Commercially available NiS4.5% sputter targets have provided a superior under-bump metallization (UBM) with lead-free tin solder bumps. Dopants other than silicon/may be used to reduce the magnetic permeability and provide other advantages of the invention.Type: ApplicationFiled: November 27, 2007Publication date: June 12, 2008Applicant: Applied Materials, Inc.Inventors: Yanping Li, Jriyan Jerry Chen, Lisa Yang
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Patent number: 7321140Abstract: A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at least 2 wt % silicon and preferably less than 20 wt %. An adhesion layer may be formed between the barrier layer and the bonding pad. For copper metallization, the adhesion layer may contain titanium or tantalum; for aluminum metallization, it may be aluminum. The nickel silicon alloy may be deposited by magnetron sputtering. Commercially available NiSi4.5% sputter targets have provided a superior under-bump metallization (UBM) with lead-free tin solder bumps. Dopants other than silicon/may be used to reduce the magnetic permeability and provide other advantages of the invention.Type: GrantFiled: March 11, 2005Date of Patent: January 22, 2008Assignee: Applied Materials, Inc.Inventors: Yanping Li, Jriyan Jerry Chen, Lisa Yang