Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: According to the present disclosure, a measuring method of liquid mixture purity includes steps as follows. A storage tank is provided, wherein the storage tank is configured for storing a liquid mixture including formic acid and water. A calculating unit is provided, wherein a plurality of formic acid purity values are saved in the calculating unit. A pressure-decreasing and heating step is performed by reducing a pressure of the storage tank and heating the storage tank. A measuring step is performed by measuring in the inner space of the storage tank to obtain a pressure value, and measuring the liquid mixture simultaneously to obtain a temperature value. A calculating step is performed by inputting the pressure value and the temperature value into the calculating unit, wherein the calculating unit outputs one of the formic acid purity values corresponding thereto.

Abstract: A virtual metrology method using a convolutional neural network (CNN) is provided. In this method, a dynamic time warping (DTW) algorithm is used to delete unsimilar sets of process data, and adjust the sets of process data to be of the same length, thereby enabling the CNN to be used for virtual metrology. A virtual metrology model of the embodiments of the present invention includes several CNN models and a conjecture model, in which plural inputs of the CNN model are sets of time sequence data of respective parameters, and plural outputs of the CNN models are inputs to the conjecture model.

Abstract: A slot cover and an integrated circuit access device having the slot cover are provided. The slot is used to be removably inserted into a slot of an electronic device and includes a frame, a positioning portion, an engaging portion, and at least one conductive elastic plate. The frame includes a center sheet, a first-side sheet configured to connect to an integrated circuit access module, and a second-side sheet. The first-side sheet and the second-side sheet are respectively located at a first side and a second side of the center sheet. The positioning portion and the engaging portion are respectively located above and below the center sheet. The at least one conductive elastic plate is disposed at the second-side sheet. When the slot cover is inserted in the slot of the electronic device, the center sheet blocks an opening of the slot.

Abstract: The present invention concerns a knitted component, especially for an article of apparel or footwear, including: a first knitted layer, including a knitted first portion with a first linear loop density along a first direction, a knitted second portion with a second linear loop density along the first direction, wherein the second linear loop density is greater than the first linear loop density; a second knitted layer, including a knitted third portion with a third linear loop density along a second direction, a knitted fourth portion with a fourth linear loop density along the second direction; wherein the first knitted layer is connected to the second knitted layer.

Abstract: The present invention provides novel heteroaryl compounds, pharmaceutical acceptable salts and formulations thereof. They are useful in preventing, managing, treating or lessening the severity of a protein kinase-mediated disease. The invention also provides pharmaceutically acceptable compositions comprising such compounds and methods of using the compositions in the treatment of protein kinase-mediated disease.

Abstract: The present invention concerns a knitted component, especially for an article of apparel or footwear, including: a first knitted layer, including a knitted first portion with a first linear loop density along a first direction, a knitted second portion with a second linear loop density along the first direction, wherein the second linear loop density is greater than the first linear loop density; a second knitted layer, including a knitted third portion with a third linear loop density along a second direction, a knitted fourth portion with a fourth linear loop density along the second direction; wherein the first knitted layer is connected to the second knitted layer.

Abstract: The present invention provides novel heteroaryl compounds, pharmaceutical acceptable salts and formulations thereof. They are useful in preventing, managing, treating or lessening the severity of a protein kinase-mediated disease. The invention also provides pharmaceutically acceptable compositions comprising such compounds and methods of using the compositions in the treatment of protein kinase-mediated disease.

Abstract: A latch module includes a fixing member and a sliding member. A first surface of the fixing member is configured to align and engage with a mounting surface of a detachable device. A sliding unit of the sliding member is relative to a guiding unit of the fixing member and allows the sliding member to slide linearly with respect to the fixing member. The sliding member includes a pushing portion corresponding to a switching column on a resilient arm of the fixing member. While the sliding member is slid to a first position, the switching column is away from the pushing portion and a convex portion of the resilient arm tends to push against the mounting surface. While the sliding member is slid to a second position, the pushing portion pushes the switching column to drive the convex portion away from the mounting surface.

Abstract: The disclosure provides a p-type metal oxide semiconductor material. The p-type metal oxide semiconductor material has the following formula: In1?xGa1?yMx+yZnO4+m, wherein M is Ca, Mg, or Cu, 0<x+y?0.1, 0?m?3, and 0<x, 0?y, or 0?x, 0<y, and wherein a hole carrier concentration of the p-type metal oxide semiconductor material is in a range of 1×1015˜6×1019 cm?3.

Abstract: The disclosure provides a p-type metal oxide semiconductor material. The p-type metal oxide semiconductor material has the following formula: In1?xGa1?yMx+yZnO4+m, wherein M is Ca, Mg, or Cu, 0<x+y?0.1, 0?m?3, and 0<x, 0?y, or 0?x, 0<y, and wherein a hole carrier concentration of the p-type metal oxide semiconductor material is in a range of 1×1015˜6×1019 cm?3.

Abstract: A flash memory controller includes a control unit, a buffer, an error correction code (ECC) module, and a configuring unit. The flash memory has a data area for storing the data content and a first spare area for storing a first ECC value corresponding to the data content. The ECC module utilizes the data content for generating a second ECC value and comparing the second ECC value with the first ECC value to determine whether the data content comprises a plurality of errors. The configuring unit computes the amount of the errors to determine whether the amount of the errors exceeds a predetermined threshold. If The configuring unit configures the data area and assigns a portion of the data area to be a second spare area. The first and the second spare area are associated with the ECC capability to allow the ECC module to correct the errors.

Abstract: A storage device for refreshing pages of a flash memory comprises a flash memory, an ECC detector and a controller. The flash memory has a plurality of pages, and each page comprises a data area for storing data and a spare area for storing error correction code (ECC) corresponding to the data. The ECC detector is used to get the number of error bits of each page. The controller coupled to the ECC detector is used for storing data and ECC in a first page to a second page when a number of used bytes of the ECC stored in a spare area of the first page exceeds a first predetermined value. A number of used bytes of the ECC stored in a spare area of the second page is less than the first predetermined value. The second page is a blank page.

Abstract: A flash memory storage device for boosting efficiency in accessing flash memory is disclosed. The flash memory storage device provides a Multi-level cell (MLC) flash memory for storing data, a single-level cell (SLC) flash memory for storing data, and a control unit for determining whether to store a file into the MLC NAND flash memory or a SLC NAND flash memory based on the file's data characteristics.

Abstract: A memory module and a method of performing the same for access of an external electronic device are provided herein. The memory module includes a NAND-type flash memory, a dynamic random access memory (DRAM) unit, and a memory controller. The dynamic random access memory unit which is electrically connected to the NAND-type flash memory includes a dynamic random access memory and an internal power. The memory controller is used for controlling at least one of both the NAND-type flash memory and the dynamic random access memory unit. When the memory module is disconnected with the external electronic device, the internal power of the dynamic random access memory unit powers the dynamic random access memory, actively. Accordingly, data stored in the dynamic random access memory will be retained.

Abstract: A slide presentation system and a method of performing the same which are capable of providing a real-time interaction among conference presenter and attendees are disclosed. When a projector projects at least one slide to as map a screened image generated from a host, an image identifying unit identifies a pointer after an image capturing unit imaging the content expressed on the projected slide. After the pointer is identified, an orienting unit detects a two-dimension coordinate value with reference to where the pointer is pointed on the projected slide as the same as the screened image of the host. Then, the two-dimension coordinate values are transmitted to the host for determining an action of the pointer according to the two-dimension coordinate value with reference to the screened image of the host. By the present invention, the pointer pointing on the projected slide can be directly implemented as functioning a mouse.

Abstract: A dual mode error correction code (ECC) apparatus for the flash memory and method thereof are described. The dual mode error correction code (ECC) apparatus includes a syndrome detection unit, a first ECC unit, a second ECC unit, a switch module, and an interface module. The syndrome detection unit detects the data content for computing the amount of errors in the data content to determine whether the amount of the errors exceeds a pre-determined threshold value. The first ECC unit corrects the errors in the data content based on a first coding mode. The second ECC unit corrects the errors in the data content based on a second coding mode. The switch module either switches to the first ECC unit for activating the first coding mode of the first ECC unit if the amount of the errors is fewer than a pre-determined threshold value or switches to the second ECC unit for activating the second coding mode of the second ECC unit if the amount of the errors is greater than the pre-determined threshold value.

Abstract: A flash memory controller having a configuring unit of error correction code (ECC) capability and method thereof are described. The flash memory controller includes a control unit, a buffer, an ECC module, and a configuring unit. The flash memory has a data area for storing the data content and a first spare area for storing a first ECC value corresponding to the data content. The ECC module utilizes the data content for generating a second ECC value and comparing the second ECC value with the first ECC value to determine whether the data content comprises a plurality of errors based on the compared result of the first ECC value and the second ECC value. The configuring unit computes the amount of the errors if the data content has the errors to determine whether the amount of the errors exceeds a predetermined threshold.

Abstract: A memory module and a method of performing the same for access of an external electronic device are provided herein. The memory module includes a NAND-type flash memory, a dynamic random access memory (DRAM) unit, and a memory controller. The dynamic random access memory unit which is electrically connected to the NAND-type flash memory includes a dynamic random access memory and an internal power. The memory controller is used for controlling at least one of both the NAND-type flash memory and the dynamic random access memory unit. When the memory module is disconnected with the external electronic device, the internal power of the dynamic random access memory unit powers the dynamic random access memory, actively. Accordingly, data stored in the dynamic random access memory will be retained.