Abstract: This provides a flexible, porous, dissolvable solid sheet article containing a cationic surfactant.

Abstract: A structural yielding link, particularly for use in an eccentrically braced frame arrangement or in a linked column frame arrangement having a first end having a means for connecting to a face of a first beam and a second end having a means for connecting to a face of a second beam; a first variable cross-section portion and a second variable cross-section portion extending from the first end and from the second end, respectively; and a constant cross-section portion joining the first variable cross-section portion and the second variable cross-section portion.

Abstract: This provides a flexible, porous, dissolvable solid sheet article containing a cationic surfactant.

Abstract: A system and method that obtains contact heights of a packaged chip. In particular, the system includes a first light source for emitting direct light, a second light source for emitting structured light, two or more cameras pointed towards the packaged chip for capturing a first set of images of the packaged chip, and a second set of images of the packaged chip, and at least one processor that processes the first set of images and the second set of images captured by the cameras to determine contact heights of the packaged chip. The cameras capture the first set of images when the first light source emits direct light towards the packaged chip, and capture the second set of images when the second light source emits structured light towards the packaged chip.

Abstract: In accordance with the objectives of the invention a new design and method for the implementation thereof is provided in the form of an “oxide ring”. A conventional die is provided with a guard ring or sealing ring, which surrounds and isolates the active surface area of an individual semiconductor die. The “oxide ring” of the invention surrounds the guard ring or sealing ring and forms in this manner a mechanical stress release buffer between the sawing paths of the die and the active surface area of the singulated individual semiconductor die.

Abstract: A method of forming an aligned dual damascene opening, comprising including the following sequential steps. A structure having a metal structure formed thereover is provided. A layer stack is formed over the metal structure. The layer stack comprises, in ascending order: a bottom etch stop layer; a lower dielectric material layer; a middle etch stop layer; a middle dielectric material layer; and an upper dielectric layer. The upper dielectric layer is patterned to form an opening exposing a portion of the underlying middle dielectric material layer. The opening having a width. A patterned mask layer is formed over the patterned upper dielectric layer leaving exposed opposing portions of the patterned upper dielectric layer. The middle dielectric material layer is patterned to form an opening therein using the patterned mask layer and the exposed portions of the upper dielectric layer as masks. The middle dielectric material layer opening exposing a portion of the middle etch stop layer.