Abstract: Systems and methods for host system memory translation are disclosed. The memory system may send a logical-to-physical address translation table to the host system. Thereafter, the host system may send commands that include a logical address and a physical address (with the host system using the logical-to-physical address translation table previously sent to generate the physical address). After sending the table to the host system, the memory system may monitor changes in the table, and record these changes in an update table. The memory system may use the update table in determining whether to accept or reject the physical address sent from the host system in processing the host system command. In response to determining to reject the physical address, the memory system may internally generate the physical address using the logical address sent from the host system and a logical-to-physical address translation table resident in the memory system.

Abstract: Systems and methods for host system memory translation are disclosed. The memory system may send a logical-to-physical address translation table to the host system. Thereafter, the host system may send commands that include a logical address and a physical address (with the host system using the logical-to-physical address translation table previously sent to generate the physical address). After sending the table to the host system, the memory system may monitor changes in the table, and record these changes in an update table. The memory system may use the update table in determining whether to accept or reject the physical address sent from the host system in processing the host system command. In response to determining to reject the physical address, the memory system may internally generate the physical address using the logical address sent from the host system and a logical-to-physical address translation table resident in the memory system.

Abstract: Technology is described for keeping current (e.g., peak power supply current or ICC) in a non-volatile memory system within a target while maintaining high throughput. Programming conditions are adaptively changed at the sub-codeword level in order to keep power supply current of the memory system within a target. In one embodiment, a chunk of data that corresponds to a sub-codeword is written while consuming lower than normal programming current in order to keep power supply current within a target. The relatively low programming current may increase the expected raw BER. However, other portions of the codeword can be written with a higher than normal programming current, which results in a lower expected bit raw error rate for the memory cells that store that portion.

Abstract: A storage system and method for adaptive thermal throttling are disclosed. In one embodiment, a method for adaptive thermal throttling is provided that is performed in a storage system having a memory. This method comprises determining if a temperature of the storage system is above a threshold temperature; and in response to determining that the temperature of the storage system is above the threshold temperature: reducing performance of the storage system in an iterative manner until the temperature of the storage system is within a temperature envelope around the threshold temperature; and storing, in the memory, a value indicating what the performance of the storage system was reduced to in order to get the temperature within the temperature envelope. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A storage system and method for adaptive thermal throttling are disclosed. In one embodiment, a method for adaptive thermal throttling is provided that is performed in a storage system having a memory. This method comprises determining if a temperature of the storage system is above a threshold temperature; and in response to determining that the temperature of the storage system is above the threshold temperature: reducing performance of the storage system in an iterative manner until the temperature of the storage system is within a temperature envelope around the threshold temperature; and storing, in the memory, a value indicating what the performance of the storage system was reduced to in order to get the temperature within the temperature envelope. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.