Patents by Inventor Judit G. Lisoni

Judit G. Lisoni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple bit phase change memory cell
    Patent number: 8649213
    Abstract: A phase change memory cell has more than one memory region each being a narrowed region of phase change memory material extending between first and second electrodes. Each of the plurality of memory regions can be programmed to be in a low resistance state or a high resistance state by applying suitable programming conditions of current and/or voltage. The resistances of the high resistance states and the programming conditions to convert the high resistance states to the low resistance state are different in each of the plurality of memory regions.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: February 11, 2014
    Assignee: NXP B.V.
    Inventors: Ludovic R. A. Goux, Thomas Gille, Judit G. Lisoni, Dirk J. C. C. M. Wouters
  • Non-volatile memory device
    Patent number: 8526225
    Abstract: A memory device comprises an array of memory cells for storing data and a voltage application unit for applying voltages to the cells for writing data to the cells. Each memory cell has a first layer comprising copper in contact with a second layer comprising a chalcogenide material. The voltage application unit is arranged to write data by switching each cell between a first resistance state and a second, lower, resistance state. The voltage application unit is arranged to switch a cell to the first resistance state by applying a potential difference across the first and second layers such that the potential at the first layer is higher than the potential at the second layer by 0.5 volts or less. The voltage application unit is arranged to switch a cell to the second resistance state by applying a potential difference across the first and second layers such that the potential at the second layer is higher than the potential at the first layer by 0.5 volts or less.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: September 3, 2013
    Assignee: NXP B.V.
    Inventors: Ludovic Goux, Judit G. Lisoni Reyes, Thomas Gille, Dirk J. C. C. M. Wouters
  • MULTIPLE BIT PHASE CHANGE MEMORY CELL
    Publication number: 20120069645
    Abstract: A phase change memory cell has more than one memory region (14,18) each being a narrowed region of phase change memory material (2) extending between first and second electrodes (4,6). Each of the plurality of memory regions (14, 18) can be programmed to be in a low resistance state or a high resistance state by applying suitable programming conditions of current and/or voltage. The resistances of the high resistance states and the programming conditions to convert the high resistance states to the low resistance state are different in each of the plurality of memory regions.
    Type: Application
    Filed: March 30, 2009
    Publication date: March 22, 2012
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW, NXP B.V.
    Inventors: Ludovic R.A. Goux, Thomas Gille, Judit G. Lisoni, Dirk J.C.C.M. Wouters