Abstract: A highly pure, replaceable wear insert and a process for manufacturing the same use a group of materials which is suitable for meeting the requirements of high temperature semiconductor technology processes and is chosen at the same time for producing thin layers or components therefrom. The materials are compacted and purified at high temperatures in compression molds and the products so produced are put to their intended use. The substantially thin-walled and crucible-shaped, always highly pure components, which are predominantly made of expanded graphite, are employed as a wear insert for protecting graphitic support crucibles from reactive attack by quartz glass crucibles in semiconductor technology processes at temperatures above 500° C.

Abstract: A CMOS output stage operates in A/B push-pull mode and is driven with a control potential (ud) from a preamplifier stage via a control line (st). The control line (st) feeds the gate terminals of a complementary transistor pair (kt), the first transistor (n1) of which is used as first push-pull output transistor and the second transistor (p1) of which is connected to the gate terminal of a second push-pull output transistor (pa) via a current balancing arrangement. The source terminal of the first and of the second transistor (n1, p1) is connected to a first and, respectively, to a second fixed potential (u1, u2), the second fixed potential (u2) being stabilised in a low-impedance manner by an active compensation circuit (K).

Abstract: The invention relates to an amplifier circuit provided with offset reduction and with a sufficiently high bandwidth, having two input stages of a first amplifier connected in parallel at the input terminals, wherein the first input stage is connected directly to the input terminals, and the second input stage is connected through a second amplifier, and wherein a third amplifier is connected at the output of the first amplifier, wherein the second amplifier is provided with a symmetrical load.

Abstract: An integrated audio amplifier includes an operation amplifier that includes a precharging device and a monitoring device. The operation amplifier further comprises an input stage and an output stage. The output stage includes a compensation capacitor. The precharging device is configured to precharge the compensation capacitor to a voltage that can be predetermined. The monitoring device detects a not-ready-for operation state of the audio amplifier and activates the precharging device, while at the same time, the output stage is blocked until such time as the compensation capacitor is charged by the precharging device to the predetermined voltage.

Abstract: A two-stage amplifier includes a first stage and a second stage that are DC-connected through a coupling capacitor Cp. A charge pump generates a bias voltage Vp that is applied across the coupling capacitor Cp leads to maintain the time average of the voltage across said coupling capacitor constant.

Abstract: To protect against electrostatic discharges in monolithic integrated circuits in CMOS technology, a lateral thyristor structure is presented which has a much lower firing voltage compared to conventional thyristor structures.

Abstract: A two-stage amplifier includes a first stage and a second stage that are DC-connected through a coupling capacitor Cp. A charge pump generates a bias voltage Vp that is applied across the coupling capacitor Cp leads to maintain the time average of the voltage across said coupling capacitor constant.

Abstract: A two-stage amplifier includes a first stage and a second stage that are DC-connected through a coupling capacitor Cp. A charge pump generates a bias voltage Vp that is applied across the coupling capacitor Cp leads to maintain the time average of the voltage across said coupling capacitor constant.

Abstract: An electrostatic discharge (ESD) protective structure is configured and arranged to protect an integrated semiconductor circuit that is located between a first potential bus with a first supply potential and a second potential bus with a second supply potential. The ESD protective structure includes a laterally shaped ESD diode having a first region with a first conduction type and a second region of a second conduction type spaced apart from the first region. The ESD protective structure is located between the potential busses and is provided with a gate electrode, such that the first region and the second region are adjusted with respect to the gate electrode, and the spacing between the first region and the second region corresponds to the length of the gate electrode.

Abstract: A two-stage amplifier includes a first stage and a second stage that are DC-connected through a coupling capacitor Cp. A charge pump generates a bias voltage Vp that is applied across the coupling capacitor Cp leads to maintain the time average of the voltage across said coupling capacitor constant.

Abstract: A voltage regulator in the form of a series regulator for generating a regulated supply voltage includes a control loop with a reference network, a difference device, and a control element. The control element is connected between a first terminal and a second terminal. The power supply for the reference network and the difference device is coupled to the second terminal. During a starting phase, a starting device with an auxiliary circuit pulls the control loop into the regular operating range.