Patents by Inventor Juergen Schwandner
Juergen Schwandner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10707069Abstract: A method of polishing a semiconductor wafer includes polishing a surface of the semiconductor wafer using a polishing pad while supplying a polishing agent slurry containing abrasives during a first step. The polishing pad is free of abrasives and includes a first surface that contacts the semiconductor wafer, the first surface having a surface structure including elevations. Supply of polishing agent slurry is subsequently ended and, in a second step, the surface of the semiconductor wafer is polished using the polishing pad while supplying a polishing agent solution having a pH value of at least 12 that is free of solids.Type: GrantFiled: March 2, 2011Date of Patent: July 7, 2020Assignee: SILTRONIC AGInventors: Juergen Schwandner, Michael Kerstan
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Patent number: 9533394Abstract: The edge region of one side of a semiconductor wafer is polished by pressing the wafer by means of a rotatable polishing head against a polishing pad lying on a rotating polishing plate, and containing fixed abrasive. The polishing head is provided with a resilient membrane radially subdivided into a plurality of chambers by gas or liquid cushions, the polishing pressure independently selectable for each chamber. The wafer is held in position during polishing by a retainer ring pressed against the polishing pad with an application pressure, a polishing agent is introduced between the wafer and the polishing pad, and the polishing pressure exerted on the wafer in a chamber lying in the edge region of the wafer of the polishing head, and the application pressure of the retainer ring, are selected so that material is essentially removed only at the edge of the wafer.Type: GrantFiled: May 5, 2010Date of Patent: January 3, 2017Assignee: Siltronic AGInventor: Juergen Schwandner
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Patent number: 9308619Abstract: A method of simultaneous double-side polishing of at least one semiconductor material wafer includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate having a front and rear side. The at least one wafer is polished between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent. The polishing agent is supplied on the front and rear side of the wafer through openings in the upper and lower polishing pads and the upper and lower polishing plates. Each polishing pad has an inner circular region and outer ring shaped region where the quantity of polishing agent emerging from openings in the working gap per unit time in the inner circular region of the polishing pad is different from the quantity that emerges from openings in the outer ring-shaped region.Type: GrantFiled: August 29, 2014Date of Patent: April 12, 2016Assignee: SILTRONIC AGInventor: Juergen Schwandner
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Patent number: 9224613Abstract: Both sides of a large diameter semiconductor wafer are polished by the following ordered steps: a) polishing the wafer backside on a polishing pad containing a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer backside and the polishing pad; b) stock polishing the wafer frontside on a polishing pad which contains a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer frontside of and the polishing pad; c) removing microroughness and microdamage from the wafer frontside by polishing the frontside on a polishing pad, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad; and d) final polishing of the wafer frontside by polishing the frontside on a polishing pad containing no fixed abrasive, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad during the polishing step.Type: GrantFiled: October 21, 2009Date of Patent: December 29, 2015Assignee: SILTRONIC AGInventor: Juergen Schwandner
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Patent number: 9193026Abstract: A method for polishing at least one semiconductor wafer while supplying a polishing agent includes performing a first simultaneous double-side polishing of the front side and the back side of the at least one semiconductor wafer with first upper and lower polishing pads, edge-notch polishing the surface of the at least one semiconductor wafer, performing a second simultaneous double-side polishing of the front side and the back side of the at least on semiconductor wafer with second upper and lower polishing pads, where the upper and lower polishing pads for the first simultaneous double-side polishing are harder and less compressible than the upper and lower polishing pads for the second simultaneous double-side polishing and performing single-side polishing of the front side of the at least one semiconductor wafer.Type: GrantFiled: March 14, 2014Date of Patent: November 24, 2015Assignee: SILTRONIC AGInventor: Juergen Schwandner
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Publication number: 20140370786Abstract: A method of simultaneous double-side polishing of at least one semiconductor material wafer includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate having a front and rear side. The at least one wafer is polished between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent. The polishing agent is supplied on the front and rear side of the wafer through openings in the upper and lower polishing pads and the upper and lower polishing plates. Each polishing pad has an inner circular region and outer ring shaped region where the quantity of polishing agent emerging from openings in the working gap per unit time in the inner circular region of the polishing pad is different from the quantity that emerges from openings in the outer ring-shaped region.Type: ApplicationFiled: August 29, 2014Publication date: December 18, 2014Inventor: Juergen Schwandner
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Patent number: 8882565Abstract: A method of polishing a semiconductor wafer includes applying a polishing pad to the semiconductor wafer so as to subject the semiconductor wafer to a polishing process and supplying an aqueous polishing agent solution between the polishing pad and the semiconductor wafer. The polishing pad includes fixedly bonded abrasives of SiO2 with an average grain size in a range of 0.1 to 1.0 ?m. The aqueous polishing agent solution comprising an alkaline component, being free of solid materials and having a variable pH value in a range of 11 to 13.5. The aqueous polishing agent solution is maintained at a pH value of less than 13 during the polishing process and the pH value of the aqueous polishing agent solution is increased to a range of 13 to 13.5 so as to end the polishing process.Type: GrantFiled: March 8, 2011Date of Patent: November 11, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Roland Koppert
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Publication number: 20140287656Abstract: A method for polishing at least one semiconductor wafer while supplying a polishing agent includes performing a first simultaneous double-side polishing of the front side and the back side of the at least one semiconductor wafer with first upper and lower polishing pads, edge-notch polishing the surface of the at least one semiconductor wafer, performing a second simultaneous double-side polishing of the front side and the back side of the at least on semiconductor wafer with second upper and lower polishing pads, where the upper and lower polishing pads for the first simultaneous double-side polishing are harder and less compressible than the upper and lower polishing pads for the second simultaneous double-side polishing and performing single-side polishing of the front side of the at least one semiconductor wafer.Type: ApplicationFiled: March 14, 2014Publication date: September 25, 2014Applicant: Siltronic AGInventor: Juergen Schwandner
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Patent number: 8721390Abstract: A method for double-side polishing of a semiconductor wafer includes situating the semiconductor wafer in a cutout of a carrier that is disposed in a working gap between an upper polishing plate covered by a first polishing pad and a lower polishing plate covered by a second polishing pad. The first and second polishing pads each include tiled square segments that are formed by an arrangement of channels on the pads, where the square segments of the first pad are larger than the segments of the second pad. The square segments of the polishing pads include abrasives. During polishing, the carrier is guided such that a portion of the wafer temporarily projects laterally outside of the working gap. A polishing agent with a pH that is variable is supplied during polishing at a pH in a range of 11 to 12.5 during a first step and at a pH of at least 13 during a second step.Type: GrantFiled: March 7, 2011Date of Patent: May 13, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert
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Patent number: 8685270Abstract: A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 ?m. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 ?m, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 ?m.Type: GrantFiled: October 12, 2010Date of Patent: April 1, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Diego Feijoo, Michael Kerstan, Georg Pietsch, Guenter Schwab
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Patent number: 8647173Abstract: A method of polishing a semiconductor wafer using a holding system including a lined cutout the size of the semiconductor wafer that is fixed to a carrier. The method includes holding the semiconductor wafer in the cutout through adhesion of a first side of the semiconductor wafer to a bearing surface in the cutout and polishing a second side of the held semiconductor wafer using a polishing pad that is fixed on a polishing plate while introducing a polishing agent between the second side of the semiconductor wafer and the polishing pad, the polishing pad including fixedly bonded abrasive materials. The carrier is guided during polishing such that a portion of the second side of the semiconductor wafer temporarily projects beyond a lateral edge of a surface of the polishing pad.Type: GrantFiled: March 11, 2013Date of Patent: February 11, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert
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Patent number: 8647985Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.Type: GrantFiled: July 2, 2008Date of Patent: February 11, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch
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Patent number: 8551870Abstract: Epitaxially coated semiconductor wafers are produced by minimally the following steps in the order specified: (a) depositing an epitaxial layer on one side of a semiconductor wafer; (b) first polishing the epitaxially coated side of the semiconductor wafer with a polishing pad with fixed abrasive while supplying a polishing solution which is free of solids; (c) CMP polishing of the epitaxially coated side of the semiconductor wafer with a soft polishing pad which contains no fixed abrasive, while supplying a polishing agent suspension; (d) depositing another epitaxial layer on the previously epitaxially coated and polished side of the semiconductor wafer.Type: GrantFiled: June 10, 2010Date of Patent: October 8, 2013Assignee: Siltronic AGInventors: Juergen Schwandner, Roland Koppert
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Patent number: 8529315Abstract: A method of producing a semiconductor wafer includes a plurality of steps carried out in the following order. Simultaneous double-side material-removal processing is carried out on a semiconductor wafer sliced from a single crystal by processing the semiconductor wafer between two rotating ring-shaped working disks. Each working disk includes first abrasives having an average grain size in a range of 5.0 to 20.0 ?m. Both sides of the semiconductor wafer are treated with an alkaline medium. Grinding of the front and rear sides of the semiconductor wafer is carried out. For the grinding of each side a first side is held using a wafer holder and the other side is processed using a grinding tool. The grinding tool includes second abrasives having an average grain size that is smaller than the average grain size of the first abrasives and having an average grain size being in a range of 1.0 to 10.0 ?m.Type: GrantFiled: January 20, 2011Date of Patent: September 10, 2013Assignee: Siltronic AGInventors: Juergen Schwandner, Michael Kerstan
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Patent number: 8500516Abstract: A method for polishing a semiconductor wafer having a first side and a second side, the method includes polishing the first side using a Fixed Abrasive Polishing (FAP) with a polishing pad including fixedly bonded abrasives having an average particle size of 0.1-1.0 ?m; applying a cement layer with a thickness of at most 3 ?m to the polished first side; fixing the polished and cemented first side on a carrier plate of a polishing machine; and polishing the second side using a single-side chemical mechanical polishing.Type: GrantFiled: October 19, 2010Date of Patent: August 6, 2013Assignee: Siltronic AGInventor: Juergen Schwandner
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Patent number: 8501028Abstract: A method for processing a semiconductor wafer includes bringing at least one grinding tool in contact with the semiconductor wafer; removing material from the semiconductor wafer using the grinding tool; disposing a liquid medium having a viscosity of at least 3×10?3 N/m2·s and at most 100×10?3 N/m2·s between the at least one grinding tool and the semiconductor wafer; and separating the at least one grinding tool and the semiconductor wafer so as to end the processing.Type: GrantFiled: September 30, 2010Date of Patent: August 6, 2013Assignee: Siltronic AGInventor: Juergen Schwandner
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Patent number: 8444455Abstract: A semiconductor wafer is polished, wherein in a first step, the rear side of the wafer is polished by a polishing pad comprising fixedly bonded abrasives having a grain size of 0.1-1.0 ?m, while supplying a polishing agent free of solid materials having a pH of at least 11.8, and, in a second step, the front side of the semiconductor wafer is polished, wherein a polishing agent having a pH of less than 11.8 is supplied. A polishing pad for use in apparatuses for polishing semiconductor wafers, has a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers.Type: GrantFiled: May 5, 2010Date of Patent: May 21, 2013Assignee: SILTRONIC AGInventors: Juergen Schwandner, Roland Koppert
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Publication number: 20130072091Abstract: A method of simultaneous double-side polishing of a front side and a rear side of at least one wafer composed of semiconductor material includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate. The at least one wafer is polished on the front side and on the rear side between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent. A respective surface of each of the first and second polishing pads is interrupted by at least one respective channel-shaped depression running spirally from a center to an edge of the respective pad.Type: ApplicationFiled: September 4, 2012Publication date: March 21, 2013Applicant: SILTRONIC AGInventor: Juergen Schwandner
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Patent number: 8389409Abstract: Semiconductor wafers are produced by a process of: a) providing a semiconductor wafer by cutting a silicon ingot into wafers; b) rounding the edge of the wafer, so that the wafer comprises plane surfaces on the frontside and backside and rounded oblique surfaces in the edge region; c) polishing the frontside and backside of the wafer, the frontside being polished by chemical-mechanical polishing using a polishing pad which is free of abrasive fixed in the polishing pad; backside polishing being carried out in three steps, using a polishing pad containing fixed abrasive which is pressed onto the backside of the wafer, a polishing agent free of solids introduced between the polishing pad and the backside of the wafer in the first step, a polishing agent containing abrasive being introduced in the second and third steps, a polishing pressure of 8-15 psi in the first and second steps being reduced to 0.5-5 psi in the third step.Type: GrantFiled: May 12, 2010Date of Patent: March 5, 2013Assignee: Siltronic AGInventor: Juergen Schwandner
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Patent number: 8388411Abstract: A method for polishing the edge of a semiconductor wafer comprises (a) providing a semiconductor wafer which has been polished on its side surfaces and which has a rounded edge; (b) polishing the edge of the wafer by fixing the semiconductor wafer on a centrally rotating chuck, delivering the wafer to a centrally rotating polishing drum, which is inclined with respect to the chuck and to which a polishing pad containing fixedly bonded abrasives is applied, and pressing semiconductor wafer and polishing drum onto one another while a polishing agent solution containing no solids is continuously supplied.Type: GrantFiled: May 5, 2010Date of Patent: March 5, 2013Assignee: Siltronic AGInventor: Juergen Schwandner