Patents by Inventor Jui-Chung Hsu

Jui-Chung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Test apparatus and test method to a memory device
    Patent number: 11598806
    Abstract: A test system is disclosed. The test system includes a tester, a first voltage stabilization circuit, and a device under test (DUT). The tester generates a first operational voltage and a control signal. The first voltage stabilization circuit transmits a second operational voltage, associated with the first operational voltage, to a socket board. The DUT operates with the second operational voltage received through the socket board. The first voltage stabilization circuit is further configured to control, according to the control signal, the second operational voltage to have a first voltage level when the DUT is operating.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: March 7, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Yu-Wei Tseng, Chih-Ming Chang, Wan-Chun Fang, Jui-Chung Hsu, Chun-Hsi Li
  • TEST APPARATUS AND TEST METHOD TO A MEMORY DEVICE
    Publication number: 20220229109
    Abstract: A test system is disclosed. The test system includes a tester, a first voltage stabilization circuit, and a device under test (DUT). The tester generates a first operational voltage and a control signal. The first voltage stabilization circuit transmits a second operational voltage, associated with the first operational voltage, to a socket board. The DUT operates with the second operational voltage received through the socket board. The first voltage stabilization circuit is further configured to control, according to the control signal, the second operational voltage to have a first voltage level when the DUT is operating.
    Type: Application
    Filed: January 21, 2021
    Publication date: July 21, 2022
    Inventors: Yu-Wei TSENG, Chih-Ming CHANG, Wan-Chun FANG, Jui-Chung HSU, Chun-Hsi LI
  • Housing assembly and memory device
    Patent number: 10062620
    Abstract: A die device includes a die including an active layer; and an interconnect feature configured for electrical connection of the active layer, wherein the interconnect feature is in contact with a substrate in the die; and a bump, independent of the die, configured for electrical connection of the active layer.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 28, 2018
    Assignee: Nanya Technology Corporation
    Inventors: Jui-Chung Hsu, Wu-Der Yang, Chia-Chi Hsu