Patents by Inventor Jui-Hao Chiang
Jui-Hao Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942513Abstract: The present disclosure provides a semiconductor structure, including a substrate having a front surface, a first semiconductor layer proximal to the front surface, a second semiconductor layer over the first semiconductor layer, a gate having a portion between the first semiconductor layer and the second semiconductor layer, a spacer between the first semiconductor layer and the second semiconductor layer, contacting the gate, and a source/drain (S/D) region, wherein the S/D region is in direct contact with a bottom surface of the second semiconductor layer, and the spacer has an upper surface interfacing with the second semiconductor layer, the upper surface including a first section proximal to the S/D region, a second section proximal to the gate, and a third section between the first section and the second section.Type: GrantFiled: January 10, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Guan-Lin Chen, Kuo-Cheng Chiang, Chih-Hao Wang, Shi Ning Ju, Jui-Chien Huang
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Patent number: 11942478Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first source/drain epitaxial feature, a second source/drain epitaxial feature disposed adjacent the first source/drain epitaxial feature, a first dielectric layer disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a first dielectric spacer disposed under the first dielectric layer, and a second dielectric layer disposed under the first dielectric layer and in contact with the first dielectric spacer. The second dielectric layer and the first dielectric spacer include different materials.Type: GrantFiled: May 6, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jui-Chien Huang, Kuo-Cheng Chiang, Chih-Hao Wang, Shi Ning Ju, Guan-Lin Chen
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Publication number: 20240096895Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
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Patent number: 11188370Abstract: A memory scheduler in a hypervisor allocates physical memory to virtual machines (VMs) based on memory usages metrics generated within the VMs and provided to the hypervisor. More particularly, the memory scheduler determines an allocation target for each VM based on a guest-generated memory usage metric associated with the VM. The allocation target can be increased or decreased from its previous value to reflect changing needs in the VM. Physical memory is allocated when a VM requests it, and is reclaimed during a reclamation process based on its associated allocation target.Type: GrantFiled: January 24, 2019Date of Patent: November 30, 2021Assignee: VMware, Inc.Inventors: Julien Freche, Philip Peter Moltmann, Jui-Hao Chiang
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Publication number: 20200241902Abstract: A memory scheduler in a hypervisor allocates physical memory to virtual machines (VMs) based on memory usages metrics generated within the VMs and provided to the hypervisor. More particularly, the memory scheduler determines an allocation target for each VM based on a guest-generated memory usage metric associated with the VM. The allocation target can be increased or decreased from its previous value to reflect changing needs in the VM. Physical memory is allocated when a VM requests it, and is reclaimed during a reclamation process based on its associated allocation target.Type: ApplicationFiled: January 24, 2019Publication date: July 30, 2020Inventors: Julien Freche, Philip Peter Moltmann, Jui-Hao Chiang
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Patent number: 10216536Abstract: Memory data for a virtual machine can be stored in a swap file, which is comprised of storage blocks. A defragmentation procedure can be performed on a thin swap file while the virtual machine is still running. The described defragmentation procedure traversing a page frame space of the virtual machine, identifying candidate page frames, relocating the swapped page, and updating the page frame. Resulting unused storage blocks are released to the storage system. A data structure for aiding the defragmentation process is also described.Type: GrantFiled: March 11, 2016Date of Patent: February 26, 2019Assignee: VMware, Inc.Inventors: Ishan Banerjee, Preeti Agarwal, Jui-Hao Chiang
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Patent number: 10083123Abstract: Examples provide a page-fault latency feedback metric to determine performance of workloads or virtual machines (VMs) running on a VM host in a cluster. A hypervisor induces page-faults by varying a memory limit associated with a VM. Page-fault latencies are measured at each of the varying memory limits. A performance loss occurring at each page-fault latency is measured and converted to a performance score. A page-fault translation table is constructed based on the page-fault latencies and assigned performance scores. When a page-fault occurs during execution of a workload on a VM host in the cluster, a cluster manager maps the page-fault latency associated with the page-fault to a performance score in the page-fault translation table. The cluster manager computes a current workload performance or VM performance based on the page-fault latency and the performance score.Type: GrantFiled: August 10, 2016Date of Patent: September 25, 2018Assignee: VMware, Inc.Inventors: Ishan Banerjee, Jui-Hao Chiang, Kiran Tati, Preeti Agarwal
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Publication number: 20180046581Abstract: Examples provide a page-fault latency feedback metric to determine performance of workloads or virtual machines (VMs) running on a VM host in a cluster. A hypervisor induces page-faults by varying a memory limit associated with a VM. Page-fault latencies are measured at each of the varying memory limits. A performance loss occurring at each page-fault latency is measured and converted to a performance score. A page-fault translation table is constructed based on the page-fault latencies and assigned performance scores. When a page-fault occurs during execution of a workload on a VM host in the cluster, a cluster manager maps the page-fault latency associated with the page-fault to a performance score in the page-fault translation table. The cluster manager computes a current workload performance or VM performance based on the page-fault latency and the performance score.Type: ApplicationFiled: August 10, 2016Publication date: February 15, 2018Inventors: Ishan Banerjee, Jui-Hao Chiang, Kiran Tati, Preeti Agarwal
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Patent number: 9880740Abstract: A computer system provides for rapid power-on operations on virtual machines (VMs) with a virtual memory space including a reservation from machine memory and a small or no swap size. When the computer system powers on a VM, the computer system creates a physical memory space for the VM with a size larger than the minimum memory reservation for the VM and a swap space with a size less than the difference between the size of the virtual memory space and the minimum memory reservation. Subsequently, the computer system iteratively decreases the size of the physical memory space for the VM and increases the size of the swap space for the VM until the size of the physical memory space equals the minimum size of the memory reservation, which may be the amount of the virtual space that is guaranteed to be backed by machine memory.Type: GrantFiled: December 17, 2015Date of Patent: January 30, 2018Assignee: VMware, Inc.Inventors: Kiran Tati, Ishan Banerjee, Jui-Hao Chiang
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Publication number: 20170262215Abstract: Memory data for a virtual machine can be stored in a swap file, which is comprised of storage blocks. A defragmentation procedure can be performed on a thin swap file while the virtual machine is still running. The described defragmentation procedure traversing a page frame space of the virtual machine, identifying candidate page frames, relocating the swapped page, and updating the page frame. Resulting unused storage locks are released to the storage system. A data structure for aiding the defragmentation process is also described.Type: ApplicationFiled: March 11, 2016Publication date: September 14, 2017Inventors: Ishan BANERJEE, Preeti AGARWAL, Jui-Hao CHIANG
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Publication number: 20170177238Abstract: A computer system provides for rapid power-on operations on virtual machines (VMs) with a virtual memory space including a reservation from machine memory and a small or no swap size. When the computer system powers on a VM, the computer system creates a physical memory space for the VM with a size larger than the minimum memory reservation for the VM and a swap space with a size less than the difference between the size of the virtual memory space and the minimum memory reservation. Subsequently, the computer system iteratively decreases the size of the physical memory space for the VM and increases the size of the swap space for the VM until the size of the physical memory space equals the minimum size of the memory reservation, which may be the amount of the virtual space that is guaranteed to be backed by machine memory.Type: ApplicationFiled: December 17, 2015Publication date: June 22, 2017Inventors: Kiran TATI, Ishan BANERJEE, Jui-Hao CHIANG
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Patent number: 9330013Abstract: A method of cloning data in a memory for a source virtual machine (VM) and at least one cloned virtual machine is proposed. A mapping relationship between a guest physical address from the source VM or the cloned VM and a host physical address of the memory is defined by a plurality of page tables configured in a plurality of hierarchical levels. In the method, metadata of the page tables in the highest level or the higher levels of the plurality of hierarchical levels is copied to the virtual machine. Remaining metadata of the page tables in the levels other than the highest level or the higher levels of the plurality of hierarchical levels is replicated to the virtual machine in response to the access operation. Data stored in the corresponding address of the memory is accessed according to the metadata and the replicated metadata.Type: GrantFiled: June 28, 2012Date of Patent: May 3, 2016Assignee: Industrial Technology Research InstituteInventors: Han-Lin Li, Jui-Hao Chiang, Tzi-Cker Chiueh
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Patent number: 9256532Abstract: A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. A least recently used (LRU) list is maintained by at least one processor according to a last access time, wherein the LRU list includes a plurality of memory pages. A first portion of the memory pages are stored in a virtual memory, a second portion of the memory pages are stored in a zram driver, and a third portion of the memory pages are stored in at least one swap disk. A space in the zram driver is set by the at least one processor. The space in the zram driver is adjusted by the processor according to a plurality of access probabilities of the memory pages in the zram driver, an overhead of a pseudo page fault, and an overhead of a true page fault.Type: GrantFiled: July 26, 2013Date of Patent: February 9, 2016Assignee: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang
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Patent number: 9128843Abstract: A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. First, a working set size of each of a plurality of virtual machines on the virtual machine system is obtained by at least one processor, wherein the working set size is an amount of memory required to run applications on each of the virtual machines. Then, an amount of storage memory is allocated to each of the virtual machines by the at least one processor according to the working set size of each of the virtual machines and at least one swapin or refault event, wherein the storage memory is a part of memory available from the computer system.Type: GrantFiled: July 26, 2013Date of Patent: September 8, 2015Assignee: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang
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Patent number: 9069669Abstract: A memory management method for a virtual machine system is provided. First, a first threshold value is set by a processor. A balloon target is then set to an allocated virtual memory size and decremented by a first decrement value stepwise by the processor according to a swapin/refault detecting result in a first adjustment state. The swapin/refault detecting result is generated by detecting at least one swapin or refault events by the processor. The balloon target stops being decremented by the processor according to the swapin/refault detecting result in a cool-down state. The balloon target is decremented by a second decrement value stepwise by the processor in a second adjustment state which is after the cool-down state. The second decrement value is less than the first decrement value, and the balloon target is not less than the first threshold value.Type: GrantFiled: July 26, 2013Date of Patent: June 30, 2015Assignee: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang
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Patent number: 9058197Abstract: A method for sharing memories of virtual machines is provided. The method is applied for a computer system configured to execute at least one virtual machine. The method includes the following steps. A memory map corresponding to the virtual machines is obtained, wherein usage states of memory pages of the virtual machine are stored in the corresponding memory map. Unused memory pages of the virtual machines are marked as free pages according to the corresponding memory map. The free pages of the virtual machines are shared. Therefore, the unused memory pages in the virtual machine can be shared. A computer system using the foregoing method is also provided.Type: GrantFiled: January 31, 2012Date of Patent: June 16, 2015Assignee: Industrial Technology Research InstituteInventors: Han-Lin Li, Jui-Hao Chiang, Tzi-Cker Chiueh, Ying-Shiuan Pan, Po-Jui Tsao
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Patent number: 8745234Abstract: A method and a manager physical machine (PM) for virtual machine (VM) consolidation are provided. The method is performed by the manager PM. A network connects the manager PM and a plurality of server PMs. A plurality of VMs is running on the server PMs. The method includes the following steps. The manager PM classifies the server PMs into redundant PMs and surviving PMs. The manager PM determines migration paths of the VMs running on the redundant PMs to the surviving PMs. The manager PM determines a parallel migration sequence of the VMs running on the redundant PMs based on the migration paths. The manager PM migrates the VMs running on the redundant PMs to the surviving PMs in parallel according to the parallel migration sequence.Type: GrantFiled: December 23, 2010Date of Patent: June 3, 2014Assignee: Industrial Technology Research InstituteInventors: Hsiao-Fei Liu, Tzi-Cker Chiueh, Jui-Hao Chiang, Che-Lun Hung
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Publication number: 20140108765Abstract: A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. First, a working set size of each of a plurality of virtual machines on the virtual machine system is obtained by at least one processor, wherein the working set size is an amount of memory required to run applications on each of the virtual machines. Then, an amount of storage memory is allocated to each of the virtual machines by the at least one processor according to the working set size of each of the virtual machines and at least one swapin or refault event, wherein the storage memory is a part of memory available from the computer system.Type: ApplicationFiled: July 26, 2013Publication date: April 17, 2014Applicant: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang
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Publication number: 20140108700Abstract: A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. A least recently used (LRU) list is maintained by at least one processor according to a last access time, wherein the LRU list includes a plurality of memory pages. A first portion of the memory pages are stored in a virtual memory, a second portion of the memory pages are stored in a zram driver, and a third portion of the memory pages are stored in at least one swap disk. A space in the zram driver is set by the at least one processor. The space in the zram driver is adjusted by the processor according to a plurality of access probabilities of the memory pages in the zram driver, an overhead of a pseudo page fault, and an overhead of a true page fault.Type: ApplicationFiled: July 26, 2013Publication date: April 17, 2014Applicant: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang
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Publication number: 20140108764Abstract: A memory management method for a virtual machine system is provided. First, a first threshold value is set by a processor. A balloon target is then set to an allocated virtual memory size and decremented by a first decrement value stepwise by the processor according to a swapin/refault detecting result in a first adjustment state. The swapin/refault detecting result is generated by detecting at least one swapin or refault events by the processor. The balloon target stops being decremented by the processor according to the swapin/refault detecting result in a cool-down state. The balloon target is decremented by a second decrement value stepwise by the processor in a second adjustment state which is after the cool-down state. The second decrement value is less than the first decrement value, and the balloon target is not less than the first threshold value.Type: ApplicationFiled: July 26, 2013Publication date: April 17, 2014Applicant: Industrial Technology Research InstituteInventors: Han-Lin Li, Tzi-Cker Chiueh, Jui-Hao Chiang