Patents by Inventor Jules D. Campbell, Jr.

Jules D. Campbell, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4513258
    Abstract: A single input oscillator circuit which provides an oscillating output signal in response to the presence of an input signal is provided. A differential comparator stage having a predetermined trip point established by a reference voltage is connected between the input terminal and a set-reset latch circuit. A gain stage has an input connected to the input termial, and variable bias is derived from both the differential stage and a set-reset latch circuit for providing the output signal in response to the voltage level of the input signal. A discharge portion is connected to the input terminal to periodically couple the input terminal to a voltage potential node in response to the latch circuit.
    Type: Grant
    Filed: July 1, 1983
    Date of Patent: April 23, 1985
    Assignee: Motorola, Inc.
    Inventors: Michael J. Jamiolkowski, Jules D. Campbell, Jr.
  • Patent number: 4484092
    Abstract: An MOS driver circuit having a capacitive voltage booster is provided. A first capacitor which is charged to a supply voltage potential is used to control a precharge device which charges a second capacitor. The charge on the second capacitor is sequentially translated by a logic portion to provide a boosted driver voltage which is substantially greater than the supply voltage to an active driver circuit. The output driver circuit may be completely disabled to eliminate a standby current in the output.
    Type: Grant
    Filed: March 22, 1982
    Date of Patent: November 20, 1984
    Assignee: Motorola, Inc.
    Inventor: Jules D. Campbell, Jr.
  • Patent number: 4394748
    Abstract: A column select circuit and a sense amplifier for use in a ROM utilizing a dynamic or static row and column select scheme is provided. The column select circuit comprises a voltage divider utilizing MOS transistors which have the gate dimensions thereof sized in proportion to the gate dimensions of the transistors in the ROM. The column select circuit provides a biasing voltage which controls a column select transistor and which tracks variations in process and supply voltage thereby providing precise biasing of the column select transistor and decreasing the access time of the ROM. The sense amplifier comprises a source follower and an output buffer stage.
    Type: Grant
    Filed: August 18, 1981
    Date of Patent: July 19, 1983
    Assignee: Motorola, Inc.
    Inventor: Jules D. Campbell, Jr.