Patents by Inventor Julian Dowden

Julian Dowden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7495334
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: February 24, 2009
    Assignee: Entorian Technologies, LP
    Inventors: Russell Rapport, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
  • Patent number: 7202555
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a bailout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: April 10, 2007
    Assignee: Staktek Group L.P.
    Inventors: David L. Roper, James W. Cady, James Wilder, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
  • Publication number: 20060131716
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 22, 2006
    Inventors: James Cady, James Wilder, David Roper, James Wehrly, Julian Dowden, Jeff Buchle
  • Patent number: 7053478
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a ballout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: May 30, 2006
    Assignee: Staktek Group L.P.
    Inventors: David L. Roper, James W. Cady, James Wilder, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
  • Publication number: 20060091521
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.
    Type: Application
    Filed: December 21, 2005
    Publication date: May 4, 2006
    Inventors: James Cady, James Wilder, David Roper, James Wehrly, Julian Dowden, Jeff Buchle
  • Publication number: 20050280135
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.
    Type: Application
    Filed: August 4, 2005
    Publication date: December 22, 2005
    Inventors: Russell Rapport, James Cady, James Wilder, David Roper, James Wehrly, Jeff Buchle, Julian Dowden
  • Publication number: 20050146011
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a bailout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired bailout footprint.
    Type: Application
    Filed: March 8, 2005
    Publication date: July 7, 2005
    Inventors: David Roper, James Cady, James Wilder, James Wehrly, Jeff Buchle, Julian Dowden
  • Publication number: 20050018412
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a ballout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint.
    Type: Application
    Filed: August 9, 2004
    Publication date: January 27, 2005
    Inventors: David Roper, James Cady, James Wilder, James Wehrly, Jeff Buchle, Julian Dowden
  • Publication number: 20050009234
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. Multiple numbers of CSPs may be stacked in accordance with the present invention. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. A form standard is disposed along a planar surface of a CSP. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. The form standard achieves a reduced profile after the CSP has been attached to the form standard. In addition, in constructing modules in accordance with some preferred modes of the invention, CSP contacts are reduced in height to create lower profile modules. Thus, low profile embodiments of the modules of the present invention are devised.
    Type: Application
    Filed: August 6, 2004
    Publication date: January 13, 2005
    Inventors: Julian Partridge, James Wehrly, Julian Dowden, David Roper, James Cady
  • Patent number: 6618257
    Abstract: Provided is a system and method for selectively stacking and interconnecting integrated circuit devices having a data path of n-bits to create a high-density integrated circuit module having a data path of greater than n-bits. Integrated circuits are vertically stacked one above the other. Where the constituent IC elements have a data path of n-bits in width, a module devised in accordance with a preferred embodiment of the present invention presents a data path 2n-bits wide. In a preferred embodiment, an interconnection frame comprised of printed circuit board material is disposed about two similarly oriented ICs to provide interconnectivity of the constituent ICs and concatenation of their respective data paths. An array of clip-leads or other connectors are appended to module connection pads to provide lead-like structures for connection of the module to its operating environment.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: September 9, 2003
    Assignee: Staktek Group, L.P.
    Inventors: James Cady, David L. Roper, James G. Wilder, Julian Dowden, Jeff Buchle
  • Patent number: 6608763
    Abstract: A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially follow an axis that is substantially perpendicular to the vertical axis of the stack. The carrier structure provides connection between elements through conductive paths disposed to provide connection between the foot of an upper IC element and the upper shoulder of the lower IC element. This leaves open to air flow most of the vertical transit section of the lower lead for cooling while creating an air gap between elements that encourages cooling airflow between the elements of the stack. A method for creating stacked integrated circuit modules according to the invention is provided.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: August 19, 2003
    Assignee: Staktek Group L.P.
    Inventors: Carmen D. Burns, James G. Wilder, Julian Dowden
  • Publication number: 20030137048
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.
    Type: Application
    Filed: March 27, 2003
    Publication date: July 24, 2003
    Applicant: Staktek Group, L.P.
    Inventors: James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Julian Dowden, Jeff Buchle
  • Patent number: 6576992
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, a pair of CSPs is stacked, with one CSP above the other. The two CSPs are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower CSP of the module. The flex circuit pair connects the upper and lower CSPs and provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of CSPs in modules provided for high-density memories or high capacity computing.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: June 10, 2003
    Assignee: Staktek Group L.P.
    Inventors: James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr., Julian Dowden, Jeff Buchle