Patents by Inventor Julien Beynet

Julien Beynet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9023737
    Abstract: A method for forming a conformal, homogeneous dielectric film includes: forming a conformal dielectric film in trenches and/or holes of a substrate by cyclic deposition using a gas containing a silicon and a carbon, nitrogen, halogen, hydrogen, and/or oxygen, in the absence of a porogen gas; and heat-treating the conformal dielectric film and continuing the heat-treatment beyond a point where substantially all unwanted carbons are removed from the film and further continuing the heat-treatment to render substantially homogeneous film properties of a portion of the film deposited on side walls of the trenches and/or holes and a portion of the film deposited on top and bottom surfaces of the trenches and/or holes.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: May 5, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Julien Beynet, Ivo Raaijmakers, Atsuki Fukazawa
  • Publication number: 20140017908
    Abstract: A method for forming a conformal, homogeneous dielectric film includes: forming a conformal dielectric film in trenches and/or holes of a substrate by cyclic deposition using a gas containing a silicon and a carbon, nitrogen, halogen, hydrogen, and/or oxygen, in the absence of a porogen gas; and heat-treating the conformal dielectric film and continuing the heat-treatment beyond a point where substantially all unwanted carbons are removed from the film and further continuing the heat-treatment to render substantially homogeneous film properties of a portion of the film deposited on side walls of the trenches and/or holes and a portion of the film deposited on top and bottom surfaces of the trenches and/or holes.
    Type: Application
    Filed: June 20, 2013
    Publication date: January 16, 2014
    Inventors: Julien Beynet, Ivo Raaijmakers, Atsuki Fukazawa
  • Patent number: 8252691
    Abstract: Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: August 28, 2012
    Assignee: ASM Genitech Korea Ltd.
    Inventors: Julien Beynet, Hyung Sang Park, Naoki Inoue
  • Publication number: 20110256727
    Abstract: Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 20, 2011
    Applicant: ASM GENITECH KOREA LTD.
    Inventors: Julien Beynet, Hyung Sang Park, Naoki Inoue
  • Patent number: RE47170
    Abstract: Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: December 18, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Julien Beynet, Hyung Sang Park, Naoki Inoue