Patents by Inventor Jun Beom Seo

Jun Beom Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9484924
    Abstract: A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: November 1, 2016
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Min Cheol Shin, Jae Hyun Lee, Doo Hyung Kang, Jun Beom Seo, Woo Jin Jeong
  • Publication number: 20160211849
    Abstract: A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node.
    Type: Application
    Filed: February 5, 2015
    Publication date: July 21, 2016
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Min Cheol Shin, Jae Hyun Lee, Doo Hyung Kang, Jun Beom Seo, Woo Jin Jeong