Abstract: Provided herein may be a memory controller and a memory system including the same. The memory controller includes a scanning period controller configured to reset, whenever scanning points sequentially arrive, access information indicating whether each of a plurality of pages is accessed, and set a scanning interval for each of the pages between the scanning points for the page based on an attribute of the page, an attribute determiner configured to determine, as a hot page or a cold page, the attribute of each of the pages based on an access interval for the page from the first scanning point among the scanning points for the page to time at which access to data stored in the page is requested, and a memory allocator configured to control first and second memory devices based on the attributes of the pages.

Abstract: A pooled memory device includes plural memory devices and a controller. The plural memory devices include a first memory and a second memory with at least one power supply configured to control power supplied to each of the plural memory devices. The controller is coupled to an interconnect device which is configured to provide the plural memory devices to at least one external device as a logical device. The controller is configured to track available storage capacities of the first memory and the second memory and cut off power supplied to an unused memory among the first memory and the second memory.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound having a structure according to Formula I, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: The technology and implementations disclosed in this patent document generally relate to a lithium secondary battery including: a first unit cell including a first anode including a 1-1 anode mixture layer and a 1-2 anode mixture layer on the 1-1 anode mixture layer, and a second unit cell including a second anode including a 2-1 anode mixture layer and a 2-2 anode mixture layer on the 2-1 anode mixture layer, wherein a weight ratio of the silicon-based active material in the 1-2 anode mixture layer is greater than a weight ratio of the silicon-based active material in the 1-1 anode mixture layer, and a weight ratio of the silicon-based active material in the 2-2 anode mixture layer is less than or equal to a weight ratio of the silicon-based active material in the 2-1 anode mixture layer.

Abstract: In some implementations, the anode includes a current collector, a first anode mixture layer formed on at least one surface of the current collector, and a second anode mixture layer formed on the first anode mixture layer. The first anode mixture layer and the second anode mixture layer include a carbon-based active material, respectively. The first anode mixture layer includes a first binder, a first silicon-based active material, and a first conductive material. The second anode mixture layer includes a second binder, a second silicon-based active material, and a second conductive material. Contents of the first conductive material and the second conductive material are different from each other with respect to the total combined weight of the first anode mixture layer and the second anode mixture layer. Types of the first silicon-based active material and the second silicon-based active material are different from each other.

Abstract: An anode for a lithium secondary battery includes an anode current collector, and an anode active material layer formed on at least one surface of the anode current collector. The anode active material layer includes a carbon-based active material, a first silicon-based active material doped with magnesium and a second silicon-based active material not doped with magnesium. A content of the first silicon-based active material is in a range from 2 wt % to 20 wt % based on a total weight of the anode active material layer.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound having a structure according to Formula I, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: A memory system includes a memory device and a controller. The memory device includes plural storage regions including plural non-volatile memory cells. The plural storage regions have a different data input/output speed. The controller is coupled to the memory device via at least one data path. The controller performs a readahead operation in response to a read request input from an external device, determines a data attribute regarding readahead data, obtained by the readahead operation, based on a time difference between reception of the read request and completion of the readahead operation, and stores the readahead data in one of the plural storage regions based on the data attribute.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include an attribute determiner configured to determine an attribute of each of a plurality of pages included in a first external device to indicate one of a hot page and a cold page, based on an access interval which is an interval from a time at which data is stored in each of the pages to a time at which access to the data is requested, a page analyzer configured to determine a ratio of hot pages having a hot page attribute to the plurality of pages, and a memory allocator configured to control one of the first external device and the second external device to store therein externally provided data based on the ratio of hot pages.

Abstract: Provided herein may be a memory controller and a memory system including the same. The memory controller includes a scanning period controller configured to reset, whenever scanning points sequentially arrive, access information indicating whether each of a plurality of pages is accessed, and set a scanning interval for each of the pages between the scanning points for the page based on an attribute of the page, an attribute determiner configured to determine, as a hot page or a cold page, the attribute of each of the pages based on an access interval for the page from the first scanning point among the scanning points for the page to time at which access to data stored in the page is requested, and a memory allocator configured to control first and second memory devices based on the attributes of the pages.

Abstract: A storage device is provided to comprise a memory device for storing data, a cache memory device including a first cache memory configured to cache certain data stored in the memory device and a second cache memory configured to store data evicted from the first cache memory, and a memory controller configured to receive a read request for first data from a host, evict second data from the first cache memory based on a reuse distance of the second data, store the second data in the second cache memory, load the first data to the first cache memory, and transmit the first data to the host.

Abstract: A memory system includes a memory device and a controller. The memory device includes plural storage regions including plural non-volatile memory cells. The plural storage regions have a different data input/output speed. The controller is coupled to the memory device via at least one data path. The controller performs a readahead operation in response to a read request input from an external device, determines a data attribute regarding readahead data, obtained by the readahead operation, based on a time difference between reception of the read request and completion of the readahead operation, and stores the readahead data in one of the plural storage regions based on the data attribute.

Abstract: A storage device is provided to comprise a memory device for storing data, a cache memory device including a first cache memory configured to cache certain data stored in the memory device and a second cache memory configured to store data evicted from the first cache memory, and a memory controller configured to receive a read request for first data from a host, evict second data from the first cache memory based on a reuse distance of the second data, store the second data in the second cache memory, load the first data to the first cache memory, and transmit the first data to the host.

Abstract: A method for operating a controller configured to control subsystems in a network, each subsystem including a plurality of memory regions, includes testing a compressibility ratio of data and selecting, according to the compressibility ratio, memory regions for storing the data and replicated data.

Abstract: A data storage device and a storage system including the same are disclosed. The data storage device includes a nonvolatile memory device configured to store user data and metadata including data type identification information matched with the user data, and a controller to control the nonvolatile memory device to be switched to a cold data storage device for storing cold data only when a number of program-erase (PE) cycles of the nonvolatile memory device is equal to or larger than a reference value.

Abstract: A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes plural memory groups storing plural chunks. The controller is capable of generating the plural chunks including data chunks and parity chunks based on original data, assign different priorities to the data chunks and the parity chunks, and recovering at least one chunk among the plural chunks based on the different priorities when an operation regarding the at least one chunk fails.

Abstract: A memory system includes a memory device including a first memory block and a second memory block, wherein the first memory block stores a first data chunk having a first size and the second memory block stores a second data chunk having a second size, and the first size is less than the second size; and a controller operatively coupled to the memory device, wherein the controller is configured to read the second data chunk from the second memory block, correct at least one error of the second data chunk when the at least one error is detected, and copy a portion of the second data chunk to the first memory block, wherein the portion of the second data chunk is error-corrected and has the first size.

Abstract: A memory system includes a non-volatile memory device including plural memory groups storing plural chunks; and a controller configured to generate the plural chunks including data chunks and parity chunks based on original data, assign different priorities to the data chunks and the parity chunks, and recover at least one chunk among the plurality of chunks based on the different priorities when an operation regarding the at least one chunk fails.

Abstract: A data storage apparatus may include a storage including a first region and second region, each region includes a plurality of memory blocks, and a controller configured to exchange data with the storage at a request of a host. The controller may include a data classification component configured to classify attributes of data stored in the storage as hot data or cold data based on continuity of the data, and configured to move the hot data to the first region and the cold data to the second region respectively by a background operation.

Abstract: A method for operating a controller configured to control subsystems in a network, each subsystem including a plurality of memory regions, includes testing a compressibility ratio of data and selecting, according to the compressibility ratio, memory regions for storing the data and replicated data.