Abstract: A semiconductor device includes a first electrode and a first carbon layer on the first electrode. A switch layer is disposed on the first carbon layer and a second carbon layer is disposed on the switch layer. At least one tunneling oxide layer is disposed between the first carbon layer and the second carbon layer. The device further includes a second electrode on the second carbon layer.

Abstract: A semiconductor device includes a first electrode and a first carbon layer on the first electrode. A switch layer is disposed on the first carbon layer and a second carbon layer is disposed on the switch layer. At least one tunneling oxide layer is disposed between the first carbon layer and the second carbon layer. The device further includes a second electrode on the second carbon layer.

Abstract: A semiconductor device includes a first electrode and a first carbon layer on the first electrode. A switch layer is disposed on the first carbon layer and a second carbon layer is disposed on the switch layer. At least one tunneling oxide layer is disposed between the first carbon layer and the second carbon layer. The device further includes a second electrode on the second carbon layer.

Abstract: A variable resistance memory device may include a first conductive line, a plurality of stacked structures, and a mold pattern. The first conductive line may be formed on a substrate. The plurality of stacked structures may be formed on the first conductive line, and each of the plurality of stacked structures includes a lower electrode, a variable resistance pattern, and a middle electrode stacked on one another. The mold pattern may be formed on the first conductive line to fill a space between the plurality of stacked structures. An upper portion of the mold pattern may include a surface treated layer and a lower portion of the mold pattern may include a non-surface treated layer.

Abstract: A semiconductor device includes a first electrode and a first carbon layer on the first electrode. A switch layer is disposed on the first carbon layer and a second carbon layer is disposed on the switch layer. At least one tunneling oxide layer is disposed between the first carbon layer and the second carbon layer. The device further includes a second electrode on the second carbon layer.

Abstract: A variable resistance memory device may include a first conductive line, a plurality of stacked structures, and a mold pattern. The first conductive line may be formed on a substrate. The plurality of stacked structures may be formed on the first conductive line, and each of the plurality of stacked structures includes a lower electrode, a variable resistance pattern, and a middle electrode stacked on one another. The mold pattern may be formed on the first conductive line to fill a space between the plurality of stacked structures. An upper portion of the mold pattern may include a surface treated layer and a lower portion of the mold pattern may include a non-surface treated layer.