Abstract: An analysis function imparting device according to the present invention includes processing circuitry configured to execute a script engine while monitoring the script engine to acquire an execution trace including an application programming interface (API) trace and a branch trace, analyze the execution trace, and detect a hook point that is a location to which a hook is applied and a code for analysis is inserted, detect, based on monitoring at the hook point, a tap point that is a memory monitoring location at which the code for analysis outputs a log, and apply a hook to the script engine to impart an analysis function to the script engine based on the hook point and the tap point.

Abstract: A trace information determination device includes an extraction unit that extracts a feature of malware, a classification unit that performs clustering on the basis of the feature of malware extracted by the extraction unit and classifies the malware into a predetermined cluster, an attack tendency determination unit that determines a tendency of an attack of the malware on the basis of the cluster classified by the classification unit, and a validity determination unit that determines validity of trace information generated from an activity trace of the malware on the basis of a result of determination by the attack tendency determination unit.

Abstract: An activity trace extraction device executes malware to collect an analysis log including a plurality of activity traces of the malware, and executes the malware again to collect an environment change analysis log including the plurality of activity traces of the malware assumed in a case where an execution environment of a system and a device used at execution of the malware and information unique to application software are changed. The activity trace extraction device updates, based on the analysis log and the environment change analysis log, the analysis log by removing, from the analysis log, an activity trace different from an activity trace of the environment change analysis log among the plurality of activity traces included in the analysis log. The activity trace extraction device generates trace information of the malware independent of the execution environment based on the analysis log updated.

Abstract: An activity trace extraction device executes malware to collect an analysis log including a plurality of activity traces of the malware, and executes the malware again in an environment indicating time information different from time information at the time of executing the malware to collect a time change analysis log including a plurality of activity traces of the malware. The activity trace extraction device updates the analysis log by removing, from the analysis log, the activity trace different from the activity trace of the time change analysis log among the plurality of activity traces included in the analysis log based on the analysis log and the time change analysis log. The activity trace extraction device generates trace information of the malware independent of time lapse based on the updated analysis log.

Abstract: The residual amount of a solvent in a water soluble nonionic alkylene oxide resin is decreased in an apparatus including an evaporation vessel and a stirring blade which scrapes-up and coats resin solution onto the inner wall surface of the evaporation vessel. A water soluble nonionic alkylene oxide resin having a crystallization temperature of 10 to 60° C. is extruded to a predetermined thickness in a molten state, the extruded molten resin is brought into contact with a metal surface which is at the crystallization temperature (Tc) or lower, and the thereby solidified resin may be cut into pellets. The resin pellets preferably are of rectangular shape and prescribed dimensions. The resin may be pulverized in a pulverizer by shearing force between a rotary blade and a fixed blade. In the pulverizer, grains smaller than a predetermined size pass through the screen, while larger grains are again pulverized.

Abstract: An integrated standard cell consisting of a plurality of standard cells each having a logical area, at least one power supply line, and one ground line, which further includes two clock signal lines for supplying clock signals. These signals are formed within each standard cell and are provided outside of the power supply line and the ground line, in parallel thereto. The two clock signal lines are connected to the logical area through each shunt line which substantially extends in the vertical direction to the clock signal lines. With this construction, a quantitative prediction for the time delay of clock signals which propagate in the clock signal lines becomes easy, thereby preventing any skew of the clock signals from occurring.

Abstract: An analog to digital converter comprising a data strobe terminal to which a signal is supplied upon the start of the converting operation, a delay circuit having a transistor with controlled conduction resistance and having its gate supplied with an analog input signal, an EX-OR gate having a first input terminal connected to the data strobe terminal and a second input terminal connected to the data strobe terminal through the delay circuit, an AND gate to which the output signal of the EX-OR gate and a clock pulse are supplied, and a counter for counting the output signal of the AND gate, whereby to produce the output of the counter as a digital signal.

Abstract: A three-output level logic circuit comprises an output stage and a drive stage for driving the output stage. The output stage includes first and second MOS transistors connected in series between first and second power sources and a terminal is provided for producing three-state output signals. The drive stage includes third to sixth MOS transistors connected in series between the first and second power sources. A terminal is provided for supplying a data signal to the fourth and fifth MOS transistors. A control signal is supplied in common to the gate electrodes of the third to sixth MOS transistors. The conductivity types of the first to sixth MOS transistors are selected to operate the logic circuit with one control signal input and one data signal input.