Patents by Inventor Jun Koyama

Jun Koyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710745
    Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: July 25, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Publication number: 20230215396
    Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 6, 2023
    Inventors: Jun KOYAMA, Atsushi UMEZAKI
  • Patent number: 11695080
    Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: July 4, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
  • Patent number: 11676975
    Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: June 13, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 11677384
    Abstract: Provided is a semiconductor device including a sequential circuit including a first transistor and a capacitor. The first transistor includes a semiconductor layer including indium, zinc, and oxygen to form a channel formation region. A node electrically connected to a source or a drain of the first transistor and a capacitor becomes a floating state when the first transistor turns off, so that a potential of the node can be maintained for a long period. A power-gating control circuit may be provided to control supply of power supply potential to the sequential circuit. The potential of the node still can be maintained while supply of the power supply potential is stopped.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: June 13, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Jun Koyama
  • Patent number: 11668988
    Abstract: When a pixel portion and a driver circuit are formed over one substrate and a counter electrode is formed over an entire surface of a counter substrate, the driver circuit may be adversely affected by an optimized voltage of the counter electrode. A semiconductor device according to the present invention has a structure in which: a liquid crystal layer is provided between a pair of substrates; one of the substrates is provided with a pixel electrode and a driver circuit; the other of the substrates is a counter substrate which is provided with two counter electrode layers in different potentials; and one of the counter electrode layers overlaps with the pixel electrode with the liquid crystal layer therebetween and the other of the counter electrode layers overlaps with the driver circuit with the liquid crystal layer therebetween. An oxide semiconductor layer is used for the driver circuit.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: June 6, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Shunpei Yamazaki
  • Publication number: 20230169998
    Abstract: An object of one embodiment of the present invention is to propose a memory device in which a period in which data is held is ensured and memory capacity per unit area can be increased. In the memory device of one embodiment of the present invention, bit lines are divided into groups, and word lines are also divided into groups. The word lines assigned to one group are connected to the memory cell connected to the bit lines assigned to the one group. Further, the driving of each group of bit lines is controlled by a dedicated bit line driver circuit of a plurality of bit line driver circuits. In addition, cell arrays are formed on a driver circuit including the above plurality of bit line driver circuits and a word line driver circuit. The driver circuit and the cell arrays overlap each other.
    Type: Application
    Filed: January 25, 2023
    Publication date: June 1, 2023
    Inventors: Jun KOYAMA, Shunpei YAMAZAKI
  • Patent number: 11636825
    Abstract: The liquid crystal display device includes a pixel portion including a plurality of pixels to which image signals are supplied; a driver circuit including a signal line driver circuit which selectively controls a signal line and a gate line driver circuit which selectively controls a gate line; a memory circuit which stores the image signals; a comparison circuit which compares the image signals stored in the memory circuit in the pixels and detects a difference; and a display control circuit which controls the driver circuit and reads the image signal in accordance with the difference. The display control circuit supplies the image signal only to the pixel where the difference is detected. The pixel includes a thin film transistor including a semiconductor layer including an oxide semiconductor.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: April 25, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Shunpei Yamazaki
  • Publication number: 20230121832
    Abstract: A portable electronic device that can operate even when electric power supplied through contactless charge by electromagnetic induction is low is provided. The portable electronic device includes a reflective liquid crystal display which includes a transistor including an oxide semiconductor, a power source portion which includes a rechargeable battery capable of charge by contactless charge, and a signal processing portion which includes a nonvolatile semiconductor memory device. In the portable electronic device, electric power stored in the rechargeable battery is used in the reflective liquid crystal display and the signal processing portion.
    Type: Application
    Filed: December 16, 2022
    Publication date: April 20, 2023
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA
  • Publication number: 20230093414
    Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 23, 2023
    Applicant: Semiconductor Energy Laboratory Co., Lid
    Inventors: Shunpei Yamazaki, Jun KOYAMA, Yasuyuki ARAI, Ikuko KAWAMATA, Atsushi MIYAGUCHI, Yoshitaka MORIYA
  • Publication number: 20230079244
    Abstract: An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 16, 2023
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Kiyoshi KATO
  • Publication number: 20230064813
    Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10?13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
    Type: Application
    Filed: November 4, 2022
    Publication date: March 2, 2023
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
  • Patent number: 11573601
    Abstract: A portable electronic device that can operate even when electric power supplied through contactless charge by electromagnetic induction is low is provided. The portable electronic device includes a reflective liquid crystal display which includes a transistor including an oxide semiconductor, a power source portion which includes a rechargeable battery capable of charge by contactless charge, and a signal processing portion which includes a nonvolatile semiconductor memory device. In the portable electronic device, electric power stored in the rechargeable battery is used in the reflective liquid crystal display and the signal processing portion.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: February 7, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 11568902
    Abstract: An object of one embodiment of the present invention is to propose a memory device in which a period in which data is held is ensured and memory capacity per unit area can be increased. In the memory device of one embodiment of the present invention, bit lines are divided into groups, and word lines are also divided into groups. The word lines assigned to one group are connected to the memory cell connected to the bit lines assigned to the one group. Further, the driving of each group of bit lines is controlled by a dedicated bit line driver circuit of a plurality of bit line driver circuits. In addition, cell arrays are formed on a driver circuit including the above plurality of bit line driver circuits and a word line driver circuit. The driver circuit and the cell arrays overlap each other.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: January 31, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Shunpei Yamazaki
  • Patent number: 11545105
    Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: January 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Atsushi Umezaki
  • Publication number: 20220416087
    Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.
    Type: Application
    Filed: August 31, 2022
    Publication date: December 29, 2022
    Inventors: Shunpei YAMAZAKI, Jun Koyama
  • Patent number: 11513562
    Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: November 29, 2022
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
  • Publication number: 20220350435
    Abstract: It is an object to provide a semiconductor display device having a touch panel, which can reduce power consumption. The semiconductor display device includes a panel which is provided with a pixel portion and a driver circuit which controls an input of the image signal to the pixel portion, and a touch panel provided in a position overlapping with the panel in the pixel portion. The pixel portion includes a display element configured to perform display in accordance with voltage of the image signal to be input, and a transistor configured to control retention of the voltage. The transistor includes an oxide semiconductor in a channel formation region. The driving frequency of the driver circuit, that is, the number of writing operations of the image signal for a certain period is changed in accordance with an operation signal from a touch panel.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 3, 2022
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA
  • Publication number: 20220340910
    Abstract: As a result of dedicated studies, the present inventors succeeded in discovering, for the first time, that fibrogenesis could be suppressed at the physiological tissue level by inhibiting sulfation at position 4 or 6 of GalNAc, which is a sugar that constitutes sugar chains. Furthermore, the present inventors conducted studies using various disease model animals, and as a result, successfully demonstrated that inhibitors of sulfation at position 4 or 6 of GalNAc had therapeutic effects on diseases caused by tissue fibrogenesis (tissue fibrogenic disorders).
    Type: Application
    Filed: June 3, 2022
    Publication date: October 27, 2022
    Applicant: STELIC INSTITUTE & CO.
    Inventors: Hiroyuki YONEYAMA, Jun KOYAMA, Masato FUJII
  • Patent number: 11456385
    Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: September 27, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama