Patents by Inventor Jun-Kyu Lee
Jun-Kyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200247106Abstract: A solar cell module disassembling device is disclosed. The device of present invention comprises a frame unit, wherein a laminated panel having a first panel and a second panel is mounted on the frame unit, and wherein the first and second panels are stacked and bonded; a guide module, being elongated in a forward and backward direction; a scraper unit, being movably coupled to the guide module, having a blade module, wherein the blade module moves in the forward and backward direction and presses the laminated panel and disassembles the laminated panel; and a transfer unit, being coupled to the scraper unit, delivering a driving force to the scraper unit, transferring the scraper unit.Type: ApplicationFiled: August 12, 2019Publication date: August 6, 2020Applicant: KOREA INSTITUTE OF ENERGY RESEARCHInventors: Jin Seok Lee, Young Soo Ahn, Gi Hwan Kang, Jun Kyu Lee
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Patent number: 10468895Abstract: Provided herein is a charger with improved radiation function capable of lowering its surface temperature to prevent the surface temperature from increasing excessively, the charger according to one aspect of the present disclosure including a printed circuit board on which circuit elements are mounted; an inner case formed in a hollow case shape of which both surfaces are open, and where the printed circuit board is arranged inside; a radiation member formed to cover an outer surface of the inner case to release heat generated in the circuit elements of the printed circuit board; an outer case formed to encompass the radiation member and provided with one open surface; a cover assembled in the outer case and configured to close the one open surface of the outer case; and a terminal coupled to one surface of the outer case, and configured to enable electricity to be supplied to the charger when inserted into a consent.Type: GrantFiled: May 31, 2016Date of Patent: November 5, 2019Assignee: SOLUM CO., LTD.Inventors: Young-seung Noh, Hyun-su Kim, Soon-joung Yio, Young-joo Kim, Jun-kyu Lee
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Patent number: 10381312Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same. The semiconductor package according to embodiments of the present disclosure includes a wiring including a plurality of layers including an insulating layer and a wiring layer, a semiconductor chip mounted on the wiring and electrically connected to the wiring layer through a bonding pad, a cover member configured to cover side surfaces of the semiconductor chip and the wiring and be in contact with at least one wiring layer, and an encapsulant configured to seal the cover member. Accordingly, the cover member covers the semiconductor chip and is in contact with the wiring formed under the semiconductor chip, thereby reducing electromagnetic interference, minimizing noise between operations of the semiconductor package, and improving a signal speed.Type: GrantFiled: May 11, 2017Date of Patent: August 13, 2019Assignee: NEPES CO., LTD.Inventors: Il-Hwan Kim, Jun-Kyu Lee, Min-A Yoon, Dong-Hoon Oh, Tae-Won Kim
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Publication number: 20190237407Abstract: Provided are a semiconductor package and a method of manufacturing the same, the semiconductor package including an interconnection part including an insulation layer and an interconnection layer, a semiconductor chip disposed on the interconnection part and electrically connected to the interconnection layer through a bonding pad, and an EMI shielding part connected to the interconnection layer while covering the semiconductor chip and the interconnection part.Type: ApplicationFiled: January 18, 2019Publication date: August 1, 2019Applicant: NEPES CO., LTD.Inventors: Jun-Kyu LEE, Jaecheon Lee
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Publication number: 20190229101Abstract: A semiconductor package includes a first package including a first semiconductor chip, a first encapsulation layer that covers the first semiconductor chip, and a first redistribution pattern connected to pads of the first semiconductor chip and a second package on the first package, the second package including a second semiconductor chip, a second encapsulation layer that covers the second semiconductor chip, and a second redistribution pattern connected to pads of the second semiconductor chip. The first redistribution pattern is connected to the second redistribution pattern through the first encapsulation layer.Type: ApplicationFiled: January 8, 2019Publication date: July 25, 2019Applicant: NEPES CO., LTD.Inventor: Jun Kyu Lee
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Publication number: 20190122899Abstract: A semiconductor package comprising a fan-out structure and a manufacturing method therefor are disclosed. A semiconductor package according to an embodiment of the present invention comprises: a wiring unit comprising an insulation layer and a wiring layer; a semiconductor chip mounted on the wiring unit and coupled to the wiring layer by flip-chip bonding; a filling member for filling a gap between the semiconductor chip and the wiring unit; and a film member for performing coating so as to cover one surface of each of the semiconductor chip, the filling member, and the wiring unit.Type: ApplicationFiled: April 3, 2017Publication date: April 25, 2019Applicant: NEPES CO., LTD.Inventors: Yong-Tae KWON, Jun-Kyu LEE, Si Woo LIM, Dong Hoon OH, Jun Sung MA, Tae-Won KIM
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Publication number: 20180132003Abstract: The present disclosure relates to technology for a sensor network, machine to machine (M2M) communication, machine type communication (MTC), and internet of things (IoT). The present disclosure may be applied to intelligent services (e.g., smart homes, smart buildings, smart cities, smart cars or connected cars, health care, digital education, retail, and security and safety-related services) based on the technology. Provided are a method, an apparatus and a recording medium in which a terminal receives additional content corresponding to a captured image from a server by using a wireless communication device, and provides the additional content, based on a signal detected by a user interaction region.Type: ApplicationFiled: May 17, 2016Publication date: May 10, 2018Inventors: Dong-chang LEE, Se-won MOON, Jun-kyu LEE, Hyun-kwon CHUNG
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Publication number: 20180079008Abstract: In a method of manufacturing metal powders in a continuous type, metal is heated at a temperature greater than a melting point to form a liquid phase metal, and the liquid phase metal and an emulsion carrier, which is emulsified without reacting with the liquid phase metal, are supplied into a container, and the liquid phase metal and the emulsion carrier are emulsified through Taylor flow to form an emulsion solution. The emulsion solution is discharged from the container, and then, the emulsion solution is cooled at a temperature smaller than the melting point to selectively solidifying the liquid phase metal in the emulsion solution to form the metal powders.Type: ApplicationFiled: November 28, 2017Publication date: March 22, 2018Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Woo Young YOON, Jun Kyu LEE, Sung man CHO
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Patent number: 9855605Abstract: In a method of manufacturing metal powders in a continuous type, metal is heated at a temperature greater than a melting point to form a liquid phase metal, and the liquid phase metal and an emulsion carrier, which is emulsified without reacting with the liquid phase metal, are supplied into a container, and the liquid phase metal and the emulsion carrier are emulsified through Taylor flow to form an emulsion solution. The emulsion solution is discharged from the container, and then, the emulsion solution is cooled at a temperature smaller than the melting point to selectively solidifying the liquid phase metal in the emulsion solution to form the metal powders.Type: GrantFiled: March 17, 2015Date of Patent: January 2, 2018Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Woo Young Yoon, Jun Kyu Lee, Sung Man Cho
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Publication number: 20170330839Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same. The semiconductor package according to embodiments of the present disclosure includes a wiring including a plurality of layers including an insulating layer and a wiring layer, a semiconductor chip mounted on the wiring and electrically connected to the wiring layer through a bonding pad, a cover member configured to cover side surfaces of the semiconductor chip and the wiring and be in contact with at least one wiring layer, and an encapsulant configured to seal the cover member.Type: ApplicationFiled: May 11, 2017Publication date: November 16, 2017Inventors: Il-Hwan KIM, Jun-Kyu LEE, Min-A YOON, Dong-Hoon OH, Tae-Won KIM
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Patent number: 9793251Abstract: Disclosed herein is a semiconductor package in which a semiconductor chip and a mounting device are packaged together. The semiconductor package includes a semiconductor chip, a mounting block on which a first mounting device is mounted on a substrate that includes a circuit formed thereon, and an interconnection part configured to electrically connect the semiconductor chip to the mounting block.Type: GrantFiled: November 30, 2015Date of Patent: October 17, 2017Assignee: NEPES CO., LTD.Inventors: Jun-Kyu Lee, Yong-Tae Kwon
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Patent number: 9754892Abstract: Disclosed herein is a stacked semiconductor package in which semiconductor chips having various sizes are stacked. In accordance with one aspect of the present disclosure, a stacked semiconductor package includes a first semiconductor chip structure provided with a first semiconductor chip, a first mold layer surrounding the first semiconductor chip, and a first penetration electrode passing through the first mold layer and electrically connected to the first semiconductor chip, and a second semiconductor chip structure vertically stacked on the first semiconductor chip structure and provided with a second semiconductor chip and a second penetration electrode electrically connected to the first penetration electrode, wherein the first semiconductor chip structure may have the same size as the second semiconductor chip structure.Type: GrantFiled: December 28, 2012Date of Patent: September 5, 2017Assignee: NEPES CO., LTD.Inventors: Yong-Tae Kwon, Jun-Kyu Lee
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Patent number: 9653397Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same, which allows a conductive path to be provided to connect upper and lower portions of the semiconductor package. A semiconductor package according to the present invention includes a semiconductor chip, a substrate including an accommodating portion to accommodate the semiconductor chip, a sealing material configured to mold the semiconductor chip and the substrate to be integrated, a through wiring configured to vertically pass through the substrate, a wiring portion configured to electrically connect the semiconductor chip and one side of the through wiring, and an external connection portion to electrically connected to the other side of the through wiring and configured to be able to be electrically connected to an outside, wherein a wiring layer of the wiring portion is provided to be connected to the through wiring.Type: GrantFiled: September 25, 2015Date of Patent: May 16, 2017Assignee: NEPES CO., LTD.Inventors: Yong-Tae Kwon, Jun-Kyu Lee
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Publication number: 20170069564Abstract: Disclosed herein is a wire-bonding type semiconductor package in which a fan out metal pattern is formed and a method of manufacturing the same. The semiconductor package includes a frame configured to transfer an electrical signal between upper and lower parts and having a through part formed therein, a first semiconductor chip accommodated in the through part, a first encapsulant with which the frame and the first semiconductor chip are integrally molded, a second semiconductor chip stacked on the first semiconductor chip, a wire configured to electrically connect the second semiconductor chip to a signal unit of the frame, a second encapsulant with which the second semiconductor chip and the wire are integrally molded, and a wiring unit provided below the frame and the first semiconductor chip and electrically connected to the frame and the first semiconductor chip.Type: ApplicationFiled: September 2, 2016Publication date: March 9, 2017Inventors: Yong-Tae KWON, Jun-Kyu LEE
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Publication number: 20160352119Abstract: Provided herein is a charger with improved radiation function capable of lowering its surface temperature to prevent the surface temperature from increasing excessively, the charger according to one aspect of the present disclosure including a printed circuit board on which circuit elements are mounted; an inner case formed in a hollow case shape of which both surfaces are open, and where the printed circuit board is arranged inside; a radiation member formed to cover an outer surface of the inner case to release heat generated in the circuit elements of the printed circuit board; an outer case formed to encompass the radiation member and provided with one open surface; a cover assembled in the outer case and configured to close the one open surface of the outer case; and a terminal coupled to one surface of the outer case, and configured to enable electricity to be supplied to the charger when inserted into a consent.Type: ApplicationFiled: May 31, 2016Publication date: December 1, 2016Applicant: SOLUM CO., LTD.Inventors: Young-seung NOH, Hyun-su KIM, Soon-joung YIO, Young-joo KIM, Jun-kyu LEE
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Publication number: 20160293580Abstract: Disclosed herein is a system in package and a method of manufacturing the same. The system in package includes a first semiconductor die including a plurality of bond pads, a lead frame disposed around the first semiconductor die and provided with a plurality of signal leads, a second semiconductor die disposed in an upper side of the first semiconductor die and connected to the lead frame by wire bonding, and a fan out metal pattern disposed in a lower side of the first semiconductor die and the lead frame to connect the bond pads and the signal leads electrically and provided with a plurality of metal pads.Type: ApplicationFiled: November 24, 2015Publication date: October 6, 2016Applicant: NEPES CO., LTD.Inventors: Jun-Kyu LEE, Yong-Tae KWON
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Publication number: 20160190108Abstract: Disclosed herein is a semiconductor package in which a semiconductor chip and a mounting device are packaged together. The semiconductor package includes a semiconductor chip, a mounting block on which a first mounting device is mounted on a substrate that includes a circuit formed thereon, and an interconnection part configured to electrically connect the semiconductor chip to the mounting block.Type: ApplicationFiled: November 30, 2015Publication date: June 30, 2016Applicant: NEPES CO., LTD.Inventors: Jun-Kyu Lee, Yong-Tae Kwon
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Publication number: 20160099210Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same, which allows a conductive path to be provided to connect upper and lower portions of the semiconductor package. A semiconductor package according to the present invention includes a semiconductor chip, a substrate including an accommodating portion to accommodate the semiconductor chip, a sealing material configured to mold the semiconductor chip and the substrate to be integrated, a through wiring configured to vertically pass through the substrate, a wiring portion configured to electrically connect the semiconductor chip and one side of the through wiring, and an external connection portion to electrically connected to the other side of the through wiring and configured to be able to be electrically connected to an outside, wherein a wiring layer of the wiring portion is provided to be connected to the through wiring.Type: ApplicationFiled: September 25, 2015Publication date: April 7, 2016Applicant: NEPES CO., LTD.Inventors: Yong-Tae KWON, Jun-Kyu LEE
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Publication number: 20150266095Abstract: In a method of manufacturing metal powders in a continuous type, metal is heated at a temperature greater than a melting point to form a liquid phase metal, and the liquid phase metal and an emulsion carrier, which is emulsified without reacting with the liquid phase metal, are supplied into a container, and the liquid phase metal and the emulsion carrier are emulsified through Taylor flow to form an emulsion solution. The emulsion solution is discharged from the container, and then, the emulsion solution is cooled at a temperature smaller than the melting point to selectively solidifying the liquid phase metal in the emulsion solution to form the metal powders.Type: ApplicationFiled: March 17, 2015Publication date: September 24, 2015Inventors: Woo Young YOON, Jun Kyu LEE, Sung Man CHO
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Publication number: 20150137346Abstract: Disclosed herein is a stacked semiconductor package in which semiconductor chips having various sizes are stacked. In accordance with one aspect of the present disclosure, a stacked semiconductor package includes a first semiconductor chip structure provided with a first semiconductor chip, a first mold layer surrounding the first semiconductor chip, and a first penetration electrode passing through the first mold layer and electrically connected to the first semiconductor chip, and a second semiconductor chip structure vertically stacked on the first semiconductor chip structure and provided with a second semiconductor chip and a second penetration electrode electrically connected to the first penetration electrode, wherein the first semiconductor chip structure may have the same size as the second semiconductor chip structure.Type: ApplicationFiled: December 28, 2012Publication date: May 21, 2015Applicant: NEPES CO., LTD.Inventors: Yong-Tae Kwon, Jun-Kyu Lee