Patents by Inventor Jun Mitake

Jun Mitake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11801647
    Abstract: A modeling method for a workpiece and the workpiece are provided. When the workpiece, at least a part of the workpiece has a hollow region and two or more openings linking an inside and the outside of the hollow region, is additively manufactured, a temporary closure to block at least one of the two or more openings of the hollow region is manufactured at a same time as laminating of a wall section of the hollow region. A peripheral edge of the temporary closure joined to the wall section, and the temporary closure has a flow hole allowing a fluid to flow in or out of the hollow region, then the temporary closure is removed after the fluid has flowed in or out.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: October 31, 2023
    Assignee: SOLIZE CORPORATION
    Inventors: Jun Mitake, Tsuneo Endo, Yuta Kurosawa
  • Publication number: 20220305737
    Abstract: A modeling method for a workpiece and the workpiece are provided. When the workpiece, at least a part of the workpiece has a hollow region and two or more openings linking an inside and the outside of the hollow region, is additively manufactured, a temporary closure to block at least one of the two or more openings of the hollow region is manufactured at a same time as laminating of a wall section of the hollow region. A peripheral edge of the temporary closure joined to the wall section, and the temporary closure has a flow hole allowing a fluid to flow in or out of the hollow region, then the temporary closure is removed after the fluid has flowed in or out.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 29, 2022
    Applicants: SOLIZE Corporation, Honda Motor Co., Ltd
    Inventors: Jun MITAKE, Tsuneo ENDO, Yuta KUROSAWA
  • Patent number: 4947373
    Abstract: A semiconductor memory is provided with a first memory cell group, a second memory cell group, a first register for a serial output operation for holding information related to the first memory cell group, a second register for a serial output operation for holding information related to the second memory cell group, and transfer means for transferring information related to either the first or second memory cell group to either the first or second serial output register. By virtue of this arrangement, while the information transferred to the first serial output register is being serially output therefrom, information can simultaneously be transferred to the second serial output register by the transfer means.
    Type: Grant
    Filed: December 17, 1987
    Date of Patent: August 7, 1990
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasunori Yamaguchi, Katsuyuki Sato, Jun Mitake, Hitoshi Kawaguchi, Masahiro Yoshida, Terutaka Okada, Makoto Morino, Tetsuya Saeki, Yosuke Yukawa, Osamu Nagashima