Abstract: As part of a video encoding or decoding operation on video data, a video coder performs a coding operation for a current video unit of the video data. As part of performing the coding operation for the current video unit, the video coder determines the availabilities of one or more video units that neighbor the current video unit. In order to determine the availability of a video unit that neighbors the current video unit, the video coder identifies, based on availabilities of video units that neighbor a parent video unit of the current video unit, an entry in a lookup table. The identified entry indicates the availability of the video unit that neighbors the current video unit. The video coder then performs a coding operation on the current video unit based on whether the video unit that neighbors the current video unit is available.

Abstract: A method for calculating a feature descriptor on a single instruction, multiple data (SIMD) processor is described. The method includes generating histogram bin indexes in a first register. The method also includes generating weights in a second register. The method further includes updating an entire histogram table in a register file based on the histogram bin indexes and the weights without storing any histogram bin to memory. Histogram bins are updated in parallel with a single instruction.

Abstract: A method, an apparatus, and a computer program product for processing touchscreen information are provided. The method may include receiving touchscreen data that includes node values representative of signals generated by a touchscreen panel, generating a first data frame including difference values, and transmitting the first data frame over a control data bus. Each of the difference values may be calculated as a difference between one of the node values and a different node-related value wherein the first data frame has a predefined size. The first data frame may be configured to permit a receiver of the first data frame to reconstruct the touchscreen data without information loss.

Abstract: A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

Abstract: A method for calculating a feature descriptor on a single instruction, multiple data (SIMD) processor is described. The method includes generating histogram bin indexes in a first register. The method also includes generating weights in a second register. The method further includes updating an entire histogram table in a register file based on the histogram bin indexes and the weights without storing any histogram bin to memory. Histogram bins are updated in parallel with a single instruction.

Abstract: Disclosed is a method and apparatus for implementing a virtual mouse. In one embodiment, the functions implemented include activating the virtual mouse, determining a location of a cursor icon associated with the virtual mouse, and deactivating the virtual mouse. In various embodiments, the position of virtual mouse is determined by a processor based upon an orientation or position of a finger touching a touchscreen and a measured or calculated pressure applied by the finger to the touchscreen.

Abstract: A particular method includes generating a first result of a first integration operation performed on a first subset of elements of the plurality of elements. The first integration operation is associated with a first level of integration. The method includes generating a second result of a second integration operation performed on the first subset of elements. The second integration operation is associated with a second level of integration. The method further includes performing a third integration operation on a second subset of elements of the plurality of elements. The third integration operation is associated with the second level of integration. The third integration operation is performed based on the first result and the second result.

Abstract: A method for memory utilization by an electronic device is described. The method includes transferring a first portion of a first decision tree and a second portion of a second decision tree from a first memory to a cache memory. The first portion and second portion of each decision tree are stored contiguously in the first memory. The first decision tree and second decision tree are each associated with a different feature of an object detection algorithm. The method also includes reducing cache misses by traversing the first portion of the first decision tree and the second portion of the second decision tree in the cache memory based on an order of execution of the object detection algorithm.

Abstract: A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

Abstract: A method, an apparatus, and a computer program product for processing touchscreen information are provided. The method may include receiving touchscreen data that includes node values representative of signals generated by a touchscreen panel, generating a first data frame including difference values, and transmitting the first data frame over a control data bus. Each of the difference values may be calculated as a difference between one of the node values and a different node-related value wherein the first data frame has a predefined size. The first data frame may be configured to permit a receiver of the first data frame to reconstruct the touchscreen data without information loss.

Abstract: A particular method includes generating a first result of a first integration operation performed on a first subset of elements of the plurality of elements. The first integration operation is associated with a first level of integration. The method includes generating a second result of a second integration operation performed on the first subset of elements. The second integration operation is associated with a second level of integration. The method further includes performing a third integration operation on a second subset of elements of the plurality of elements. The third integration operation is associated with the second level of integration. The third integration operation is performed based on the first result and the second result.

Abstract: A method for memory utilization by an electronic device is described. The method includes transferring a first portion of a first decision tree and a second portion of a second decision tree from a first memory to a cache memory. The first portion and second portion of each decision tree are stored contiguously in the first memory. The first decision tree and second decision tree are each associated with a different feature of an object detection algorithm. The method also includes reducing cache misses by traversing the first portion of the first decision tree and the second portion of the second decision tree in the cache memory based on an order of execution of the object detection algorithm.

Abstract: A set of even interpolated sub-pixels is formed based on a pixel window and a tap coefficient register having a tap coefficient set, the pixel window is shifted and, applying the tap coefficient register a set of odd interpolated pixels is formed. The set of even interpolated sub-pixels and the set of odd interpolated sub-pixels are accumulated, repeatedly, until a termination condition is let. In the accumulating, the tap coefficient register is updated with another tap coefficient set, the pixel window is shifted, and the even interpolated pixels are incremented, the pixel window is then shifted again and the odd interpolated pixels are incremented.

Abstract: A method for processing an image is described. Mask bits are determined for a current pixel. The mask bits indicate intensity comparisons between the current pixel and multiple neighboring pixels. The mask bits also indicate whether each of the current pixel's neighboring pixels have been processed. A next pixel is selected for processing based on the mask bits.

Abstract: Techniques for reducing bus traffic during texture decoding of a video bitstream are provided. In one configuration, a wireless communication device (e.g., cellular phone, etc.) comprises a processor configured to execute instructions operative to decode and separate in a bitstream macroblock (MB) information and residual packet data. The residual packet data is used to generate codec-independent non-zero MB-packets having a universal order that is codec independent. The codec-independent non-zero MB-packets and MB information are then used for reconstructing pixels of a respective frame of the video bitstream.

Abstract: A set of even interpolated sub-pixels is formed based on a pixel window and a tap coefficient register having a tap coefficient set, the pixel window is shifted and, applying the tap coefficient register a set of odd interpolated pixels is formed. The set of even interpolated sub-pixels and the set of odd interpolated sub-pixels are accumulated, repeatedly, until a termination condition is let. In the accumulating, the tap coefficient register is updated with another tap coefficient set, the pixel window is shifted, and the even interpolated pixels are incremented, the pixel window is then shifted again and the odd interpolated pixels are incremented.

Abstract: A method for performing texture decoding in a multi-threaded processor includes substantially simultaneously decoding, in multiple hardware threads, at least two macro-blocks of a VP8 frame. Each hardware thread decodes one macro-block at a time. The method may also include assigning a macro-block from the at least two macro-blocks of the VP8 frame to a hardware thread of the multi-threaded processor.

Abstract: As part of a video encoding or decoding operation on video data, a video coder performs a coding operation for a current video unit of the video data. As part of performing the coding operation for the current video unit, the video coder determines the availabilities of one or more video units that neighbor the current video unit. In order to determine the availability of a video unit that neighbors the current video unit, the video coder identifies, based on availabilities of video units that neighbor a parent video unit of the current video unit, an entry in a lookup table. The identified entry indicates the availability of the video unit that neighbors the current video unit. The video coder then performs a coding operation on the current video unit based on whether the video unit that neighbors the current video unit is available.

Abstract: Embodiments of the present disclosure provide electronic devices and methods for equipping a multi-threaded processor with firmware instructions to configure threads to perform dedicated functions to expedite decoding of video data. In a particular embodiment, an electronic device includes a multi-threaded processor and a memory. The memory includes firmware including instructions executable by the multi-threaded processor, without use of a dedicated hardware macroblock decoding module, to decode video data compliant with a VP6 format.

Abstract: Implementations include methods and systems for a converting reference images or video to 3D images or video. A two-step conversion is described which accomplishes warping and hole filling on a pixel-by-pixel basis. In one implementation, of a plurality of pixel values of a reference image at a plurality of first collinear pixels locations are successively mapped to a respective plurality of second pixel locations of a destination image. Between two of the mappings, a location of a hole between two of the second pixel locations may be identified and filled.