Abstract: A heat dissipation optimization method for silicon-based SU-8 thin film packaging, a molybdenum copper sheet is arranged on the back of the embedded chip, and the chip wiring and interconnection is realized on the front side of the silicon substrate through the metal pattern on the SU-8 photoresist, the silicon wafer thinning process on the back side exposes the molybdenum copper sheet from the surface of the silicon substrate and directly contacts the heat sink to achieve heat dissipation optimization; SU-8 photoresist as the packaging medium, and carries out the MEMS process in combination with the silicon substrate, so as to realize abundant three-dimensional structures and fulfill the requirements of high integration and miniaturization of packaging.

Abstract: The invention relates to a heatsink antenna array structure, which includes a fin-shaped metal heatsink, a metal bottom base of heatsink, and a substrate. The upper surface of substrate is connected with the metal bottom base of heatsink, the lower surface is connected with a chip. The chip works as heat source. There is a rectangular through-cavity array in the bottom base as radiation aperture. The substrate contains multiple metal layers and dielectric layers. The top metal layer has rectangular apertures corresponding to the rectangular through-cavity array in the bottom base. The dielectric layers contain metallic vias to construct a substrate integrated waveguide structure. The metallic vias effectively reduce the thermal resistance between the fin-shaped metal heatsink and the chip, and form the substrate integrated waveguide structure as the feeding network of heatsink antenna array.

Abstract: The invention relates to a heatsink antenna array structure, which includes a fin-shaped metal heatsink, a metal bottom base of heatsink, and a substrate. The upper surface of substrate is connected with the metal bottom base of heatsink, the lower surface is connected with a chip. The chip works as heat source. There is a rectangular through-cavity array in the bottom base as radiation aperture. The substrate contains multiple metal layers and dielectric layers. The top metal layer has rectangular apertures corresponding to the rectangular through-cavity array in the bottom base. The dielectric layers contain metallic vias to construct a substrate integrated waveguide structure. The metallic vias effectively reduce the thermal resistance between the fin-shaped metal heatsink and the chip, and form the substrate integrated waveguide structure as the feeding network of heatsink antenna array.