Abstract: A smart charging method and an electronic device using the same are provided. The smart charging method includes the following steps. Whether an electronic device is connected to a charger is determined. If the battery is connected to the charger, whether a current time is within a predetermined idle period is determined. If the current time is within the predetermined idle period, a battery of the electronic device is charged at a charge rate less than 0.8C by constant current charging, which lasts for a predetermined constant current charging time. After the predetermined constant current charging time is over, the battery is idled for a predetermined idle time. After the predetermined idle time is over, the battery is charged by constant voltage charging.

Abstract: Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover.

Abstract: The present invention relates to a foamable composition used to prepare foamed thermoplastic polyurethane and a microwave molded body thereof. The foamable composition includes unfoamed thermoplastic polyurethane particles, a thickener or a bridging agent, and a foaming agent, wherein the unfoamed thermoplastic polyurethane particles have a viscosity of 1,000 poise to 9,000 poise measured at 170° C. according to JISK 7311 test method.

Abstract: Methods, systems, and devices for wireless communications are described. A first user equipment (UE) may monitor for sidelink messages among multiple UEs using transmission-side sensing. The first UE may monitor for sidelink messages over a transmit beam selected for transmitting data from the first UE. The first UE may receive, from a second UE, a sidelink message including an indication of resources reserved for sidelink transmissions to the second UE. Based on the indication, the first UE may select available resources over which to transmit data. The first UE may receive the sidelink message over a sidelink feedback channel.

Abstract: A method for forming a semiconductor structure includes forming strip patterns over a semiconductor substrate, forming a hard mask layer over the strip patterns, and forming a patterned photoresist layer over the hard mask layer. The patterned photoresist layer has a plurality of first openings. The method also includes etching the hard mask layer using the patterned photoresist layer. Remaining portions of the hard mask layer form a plurality of pillar patterns that are separated from one another. The method also includes depositing a dielectric layer along the plurality of pillar patterns, etching the dielectric layer to form a plurality of second openings, removing the plurality of pillar patterns to form a plurality of third openings in the dielectric layer, and etching the strip patterns using the dielectric layer as a mask.

Abstract: A switching regulator includes: a power stage circuit, a control circuit and an operation clock signal generator circuit. The operation clock signal generator circuit includes: a time point option unit generating a time point option signal according to a phase node voltage during a ringing period subsequent to a blanking period, to indicate at least one available turn-on time point, or generating a lowest voltage time point signal according to the phase node voltage during a tolerance period, to indicate a lowest voltage time point; and a time point deciding unit deciding the tolerance period according to a base clock signal and a tolerable frequency range and select the available turn-on time point or the lowest voltage time point within the tolerance period as a decided time point, to generate the operation clock signal.

Abstract: A conductive structure, includes: a plurality of conductive layers; a plurality of conductive pillars being formed on the plurality of conductive layers, respectively; and a molding compound laterally coating the plurality of conductive pillars. Each of the plurality of conductive pillars is a taper-shaped conductive pillar, and is tapered from the conductive layers.

Abstract: A projection system and a control method thereof are provided. The projection system includes a projector. The projector comprises a projection module and a processor. The processor is electrically coupled to the projection module. The projector confirms whether a first triggering event is detected and turns on a sleep aid mode in response to the first triggering event. The sleep aid mode corresponds to at least one control parameter. In the sleep aid mode, the projection module plays at least one multimedia file according to the at least one control parameter. The processor adjusts at least one parameter value of the at least one control parameter to adjust the at least one multimedia file correspondingly. The projector confirms whether a second triggering event is detected and the projection module stops playing the at least one multimedia file and turns off the sleep aid mode in response to the second triggering event.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive information identifying a sidelink discontinuous reception (DRX) configuration, that is different from an access link DRX configuration, associated with operation in a sidelink communication deployment. The UE may monitor a physical downlink control channel (PDCCH) discontinuously using the sidelink DRX configuration. Numerous other aspects are described.

Abstract: There is disclosed a User Equipment for a MulteFire wireless communication network. The User Equipment comprises processing circuitry and a transmitter, the User Equipment being adapted for utilizing the processing circuitry and the transmitter for performing a Listen-Before-Talk (LBT) procedure for one or more transmission bandwidths; transmitting Physical Uplink Shared CHannel (PUSCH) signaling in a PUSCH subframe on one or more interlaces within the one or more transmission bandwidths; and transmitting Sounding Reference Signaling on the one or more interlaces in the PUSCH subframe.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.

Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.

Abstract: The present invention is directed to compressed hemostatic tablets or forms comprising a fibrous non-woven oxidized cellulose (OC or ORC) multilayer material compressed into a form stable tablet, further comprising calcium salt, with the tablets rapidly expandable on contact with blood or blood plasma. The compressed forms may further comprise a multi-arm PEG-SG and are dimensionally, preferably with regard to length and width, stable for at least 48 hours after compression. In some embodiments, the compressed forms will expand upon contact with blood from 1.5 to 5 times of tablet length in 5 seconds; from 2 to 6 times of tablet length in 20 seconds; and from 3 to 6 times of tablet length in 5 minutes. The compressed forms are effective in hemostasis in heparinized blood.

Abstract: A method and a system are provided in which a message is encoded, by a neural encoder, to generate a codeword having a first length corresponding to a first code rate of the neural encoder. A number of components of the codeword corresponds to the first code rate. At least one of repeating the components or puncturing at least one of the components is performed to generate a rate-matched codeword having a second length corresponding to a second code rate. The rate-matched codeword is estimated and modified to generate an estimated codeword having the first length corresponding to the first code rate of a neural decoder. The estimated codeword is decoded, by the neural decoder, to generate an estimated message.

Abstract: A power factor correction (PFC) converter comprises an inductor, a main switch, a voltage divider, a diode, and a controller. The main switch controls the inductor performing magnetization and demagnetization, wherein a voltage difference between two ends of the main switch is a switch voltage. The voltage divider divides the switch voltage and generates a division voltage. The controller performs the following operations periodically in general mode: turning on the main switch; turning off the main switch after the main switch is turned on for a period of time; obtaining the switch voltage according to the division voltage, and determining the period of time for which the main switch is turned on next time according to the switch voltage and a predetermined output voltage of the PFC converter; and obtaining an output voltage according to the switch voltage during a period of time after the main switch is turned off.

Abstract: A semiconductor device according to the present disclosure includes a gate extension structure, a first source/drain feature and a second source/drain feature, a vertical stack of channel members extending between the first source/drain feature and the second source/drain feature along a direction, and a gate structure wrapping around each of the vertical stack of channel members. The gate extension structure is in direct contact with the first source/drain feature.

Abstract: A base station may instruct a UE to use at least one weighting factor associated with a CR for the UE, and the UE may apply the at least one weighting factor to the one or more resources scheduled for the PSSCH transmission to determine the CR. The UE may transmit the PSSCH in the one or more resources of the at least one slot based on the determined CR being less than or equal to a CR threshold value. The at least one weighting factor may be applied to the one or more resources in each of multiple slots scheduled for transmission of a PSSCH.

Abstract: The present disclosure generally relates to a dual free layer two dimensional magnetic recording read head. The read head comprises a first lower shield, a first sensor disposed over the first lower shield, a first upper shield disposed over the first sensor, a read separation gap (RSG) disposed on the first upper shield, a second lower shield disposed over the RSG, a second sensor disposed over the second lower shield, and a second upper shield disposed over the second sensor. In some embodiments, the second lower shield comprises a CoFeHf layer. In another embodiment, the second lower shield is a synthetic antiferromagnetic multilayer comprising a first shield layer, a second shield layer, and a CoFe/Ru/CoFe anti-ferromagnetic coupling layer or a Ru layer disposed therebetween, the first and second shield layers comprising NiFe and CoFe. In yet another embodiment, the second lower shield comprises layers of Ru, IrMn, and NiFe.

Abstract: A modulation device includes a substrate, an electrostatic discharge protection element, an electronic element, and a driving element. The substrate has an active region. The electrostatic discharge protection element is arranged around the active region. The electronic element is disposed in the active region. The driving element is electrically connected to the electronic element.

Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.