Patents by Inventor Jung-Bum Lim
Jung-Bum Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230217646Abstract: A semiconductor device includes a vertical stack of ring-shaped electrodes that are electrically connected together into a top electrode of a capacitor, on a semiconductor substrate. A bottom electrode of the capacitor is also provided, which extends vertically in a direction orthogonal to a surface of the substrate and through centers of the vertical stack of ring-shaped electrodes. An electrically insulating bottom supporting pattern is provided, which extends between a lowermost one of the ring-shaped electrodes and an intermediate one of the ring-shaped electrodes.Type: ApplicationFiled: August 16, 2022Publication date: July 6, 2023Inventors: Jung-Bum Lim, Seungjin Kim, Sangchul Yang, Jeon Il Lee, Hoin Lee
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Patent number: 10692968Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: GrantFiled: November 27, 2019Date of Patent: June 23, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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Publication number: 20200098854Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: ApplicationFiled: November 27, 2019Publication date: March 26, 2020Inventors: Jong-Min LEE, Jongryul JUN, Eun A. KIM, Jung-Bum LIM
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PHOTOMASK LAYOUT, METHODS OF FORMING FINE PATTERNS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
Publication number: 20200083356Abstract: A method of forming fine patterns including forming a plurality of first sacrificial patterns on a target layer, the target layer on a substrate, forming first spacers on respective sidewalls of the first sacrificial patterns, removing the first sacrificial patterns, forming a plurality of second sacrificial patterns, the second sacrificial patterns intersecting with the first spacers, each of the second sacrificial patterns including a line portion and a tab portion, and the tab portion having a width wider than the line portion, forming second spacers on respective sidewalls of the second sacrificial patterns, removing the second sacrificial patterns, and etching the target layer through hole regions, the hole regions defined by the first spacers and the second spacers, to expose the substrate may be provided.Type: ApplicationFiled: September 13, 2019Publication date: March 12, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-Bum LIM, Jong-Ryul JUN, Eun-A KIM, Jong-Min LEE -
Patent number: 10497775Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: GrantFiled: February 5, 2019Date of Patent: December 3, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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Photomask layout, methods of forming fine patterns and method of manufacturing semiconductor devices
Patent number: 10439048Abstract: A method of forming fine patterns including forming a plurality of first sacrificial patterns on a target layer, the target layer on a substrate, forming first spacers on respective sidewalls of the first sacrificial patterns, removing the first sacrificial patterns, forming a plurality of second sacrificial patterns, the second sacrificial patterns intersecting with the first spacers, each of the second sacrificial patterns including a line portion and a tab portion, and the tab portion having a width wider than the line portion, forming second spacers on respective sidewalls of the second sacrificial patterns, removing the second sacrificial patterns, and etching the target layer through hole regions, the hole regions defined by the first spacers and the second spacers, to expose the substrate may be provided.Type: GrantFiled: July 20, 2018Date of Patent: October 8, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Bum Lim, Jong-Ryul Jun, Eun-A Kim, Jong-Min Lee -
Publication number: 20190172904Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: ApplicationFiled: February 5, 2019Publication date: June 6, 2019Inventors: Jong-Min LEE, Jongryul JUN, Eun A KIM, Jung-Bum LIM
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Patent number: 10211282Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: GrantFiled: September 22, 2017Date of Patent: February 19, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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PHOTOMASK LAYOUT, METHODS OF FORMING FINE PATTERNS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
Publication number: 20180350957Abstract: A method of forming fine patterns including forming a plurality of first sacrificial patterns on a target layer, the target layer on a substrate, forming first spacers on respective sidewalls of the first sacrificial patterns, removing the first sacrificial patterns, forming a plurality of second sacrificial patterns, the second sacrificial patterns intersecting with the first spacers, each of the second sacrificial patterns including a line portion and a tab portion, and the tab portion having a width wider than the line portion, forming second spacers on respective sidewalls of the second sacrificial patterns, removing the second sacrificial patterns, and etching the target layer through hole regions, the hole regions defined by the first spacers and the second spacers, to expose the substrate may be provided.Type: ApplicationFiled: July 20, 2018Publication date: December 6, 2018Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-Bum Lim, Jong-Ryul Jun, Eun-A Kim, Jong-Min Lee -
Patent number: 10050129Abstract: A method of forming fine patterns including forming a plurality of first sacrificial patterns on a target layer, the target layer on a substrate, forming first spacers on respective sidewalls of the first sacrificial patterns, removing the first sacrificial patterns, forming a plurality of second sacrificial patterns, the second sacrificial patterns intersecting with the first spacers, each of the second sacrificial patterns including a line portion and a tab portion, and the tab portion having a width wider than the line portion, forming second spacers on respective sidewalls of the second sacrificial patterns, removing the second sacrificial patterns, and etching the target layer through hole regions, the hole regions defined by the first spacers and the second spacers, to expose the substrate may be provided.Type: GrantFiled: February 21, 2017Date of Patent: August 14, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Bum Lim, Jong-Ryul Jun, Eun-A Kim, Jong-Min Lee
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Publication number: 20180012955Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: ApplicationFiled: September 22, 2017Publication date: January 11, 2018Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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Patent number: 9799724Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: GrantFiled: June 5, 2015Date of Patent: October 24, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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Publication number: 20170256628Abstract: A method of forming fine patterns including forming a plurality of first sacrificial patterns on a target layer, the target layer on a substrate, forming first spacers on respective sidewalls of the first sacrificial patterns, removing the first sacrificial patterns, forming a plurality of second sacrificial patterns, the second sacrificial patterns intersecting with the first spacers, each of the second sacrificial patterns including a line portion and a tab portion, and the tab portion having a width wider than the line portion, forming second spacers on respective sidewalls of the second sacrificial patterns, removing the second sacrificial patterns, and etching the target layer through hole regions, the hole regions defined by the first spacers and the second spacers, to expose the substrate may be provided.Type: ApplicationFiled: February 21, 2017Publication date: September 7, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-Bum LIM, Jong-Ryul JUN, Eun-A KIM, Jong-Min LEE
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Publication number: 20160073502Abstract: Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.Type: ApplicationFiled: June 5, 2015Publication date: March 10, 2016Inventors: Jong-Min Lee, Jongryul Jun, Eun A Kim, Jung-Bum Lim
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Method and apparatus for supporting discontinuous reception operation in mobile communication system
Patent number: RE49879Abstract: A method and an apparatus for supporting a discontinuous reception (DRX) operation in a Node B in a mobile communication system are provided. The method includes defining a second System Frame Number (SFN) where one cycle of a first SFN corresponds to one bit, transmitting information on the second SFN to a User Equipment (UE), determining a second SFN which is used to transmit a paging signal to the UE, determining a first SFN which is used to transmit the paging signal in the determined second SFN, and transmitting the paging signal to the UE at the determined first SFN.Type: GrantFiled: November 7, 2019Date of Patent: March 19, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Bum Kim, Sung-Ho Choi, Soeng-Hun Kim, Kyeong-In Jeong, Jung-Soo Jung, Chae-Gwon Lim