Abstract: A display device includes a display panel. The display panel includes pixels connected to gate lines and data lines. A sensor overlaps the display panel. A gate driver is configured to provide a gate signal to the gate lines. In a first mode, the gate driver provides the gate signal to the gate lines using progressive scanning In a second mode, the gate driver provides the gate signal using interlaced scanning, and the sensor operates in a period allocated between periods in which a first interlaced scanning operation and a second interlaced scanning operation are performed within one frame period.

Abstract: A display device including pixels connected to a p-type scan line, an n-type scan line, and a data line, to display an image in a first mode with a first frequency or a second mode with a second, lower frequency, a first scan driver to supply a p-type signal having a first voltage to the p-type scan line, and a second scan driver to supply an n-type signal having a second, greater voltage to the n-type scan line, the second mode includes a first period corresponding to one frame period and a second period including consecutive frame periods, in which during the first period, the scan drivers supply i number of corresponding signals to the p-type and n-type scan lines, respectively, and during at least one frame of the second period, the first scan driver supplies j number of p-type signals to the p-type scan line.

Abstract: The present disclosure relates to a display apparatus enhancing a display quality and a method of driving the display apparatus. The display apparatus comprises a display panel and a power voltage generator. The display panel comprises a plurality of pixels. The power voltage generator is configured to output a first initialization voltage, a second initialization voltage, a first power voltage, and a second power voltage less than the first power voltage to the plurality of pixels. The power voltage generator is configured to output the second initialization voltage substantially equal to the second power voltage in response to an emergency shutdown signal.

Abstract: The present disclosure relates to a display apparatus enhancing a display quality and a method of driving the display apparatus. The display apparatus comprises a display panel and a power voltage generator. The display panel comprises a plurality of pixels. The power voltage generator is configured to output a first initialization voltage, a second initialization voltage, a first power voltage, and a second power voltage less than the first power voltage to the plurality of pixels. The power voltage generator is configured to output the second initialization voltage substantially equal to the second power voltage in response to an emergency shutdown signal.

Abstract: A display device including pixels connected to a p-type scan line, an n-type scan line, and a data line, to display an image in a first mode with a first frequency or a second mode with a second, lower frequency, a first scan driver to supply a p-type signal having a first voltage to the p-type scan line, and a second scan driver to supply an n-type signal having a second, greater voltage to the n-type scan line, the second mode includes a first period corresponding to one frame period and a second period including consecutive frame periods, in which during the first period, the scan drivers supply i number of corresponding signals to the p-type and n-type scan lines, respectively, and during at least one frame of the second period, the first scan driver supplies j number of p-type signals to the p-type scan line.

Abstract: In a method of operating a display panel, a plurality of data lines are divided into a first data line group through an N-th data line group, where N is a natural number equal to or greater than two. Each of the first through N-th data line groups includes at least two data lines. The first through N-th data line groups are sequentially driven by applying first data voltages through N-th data voltages to the first through N-th data line groups, respectively at different times. A first number of data lines in the first data line group is variable.

Abstract: A display includes: pixels arranged in a display area (DA) in a first direction (FD) and a second direction (SD), each pixel to display one of first to third colors; gate lines (GLs) extending in the FD in the DA, arranged in the SD, and connected to the pixels; a stage unit (SU) in a non-DA, the SU including stages and being connected to the GLs; clock lines (CLs) to receive signals to control the SU, the CLs extending in the SD in the non-DA and being arranged in the FD; and bridge lines connecting the CLs with the SU. First and second CLs are connected to stages connected to pixels to display the first color. Third and fourth CLs are connected to stages connected to pixels to display the second color. Fifth and sixth CLs are connected to stages connected to pixels to display the third color.

Abstract: A display includes: pixels arranged in a display area (DA) in a first direction (FD) and a second direction (SD), each pixel to display one of first to third colors; gate lines (GLs) extending in the FD in the DA, arranged in the SD, and connected to the pixels; a stage unit (SU) in a non-DA, the SU including stages and being connected to the GLs; clock lines (CLs) to receive signals to control the SU, the CLs extending in the SD in the non-DA and being arranged in the FD; and bridge lines connecting the CLs with the SU. First and second CLs are connected to stages connected to pixels to display the first color. Third and fourth CLs are connected to stages connected to pixels to display the second color. Fifth and sixth CLs are connected to stages connected to pixels to display the third color.

Abstract: A method of driving a display device including a display panel is provided. The display panel includes a plurality of gate lines. The gate lines are divided into a plurality of gate line groups. The method includes applying different gate delay values to each of the gate line groups to generate gate signals and outputting the gate signals to the gate lines. A first gate delay value is applied to at least one of the gate lines during a first frame and a second gate delay value different from the first delay value is applied to the at least one of the gate lines during a second frame.

Abstract: A display apparatus includes a display panel, a gate driver and a data driver. The display panel includes gate lines, data lines and pixels electrically connected to the gate lines and the data lines. The gate driver is disposed adjacent to a first side of the display panel, and outputs a gate signal to the gate line. The data driver is disposed adjacent to the first side of the display panel, and outputs a data voltage to the data line. A gate signal applied to a position having a low resistance-capacitance (“RC”) delay of the gate line has a kickback slice greater than a kickback slice of a gate signal applied to a position having a high RC delay of the gate line. The kickback slice is defined as a portion having a level lower than a gate-on voltage level in a gate pulse of the gate signal.

Abstract: In a method of operating a display panel, a plurality of data lines are divided into a first data line group through an N-th data line group, where N is a natural number equal to or greater than two. Each of the first through N-th data line groups includes at least two data lines. The first through N-th data line groups are sequentially driven by applying first data voltages through N-th data voltages to the first through N-th data line groups, respectively at different times. A first number of data lines in the first data line group is variable.

Abstract: A display panel includes a plurality of pixels positioned in the display area, a pixel driver connected with two or more of the plurality of pixels and configured to drive the connected pixels, and a plurality of signal lines configured to transfer signals to the pixel driver, in which at least one of the plurality of signal lines overlaps the pixel driver.

Abstract: A display apparatus includes a display panel, a gate driver and a data driver. The display panel includes gate lines, data lines and pixels electrically connected to the gate lines and the data lines. The gate driver is disposed adjacent to a first side of the display panel, and outputs a gate signal to the gate line. The data driver is disposed adjacent to the first side of the display panel, and outputs a data voltage to the data line. A gate signal applied to a position having a low resistance-capacitance (“RC”) delay of the gate line has a kickback slice greater than a kickback slice of a gate signal applied to a position having a high RC delay of the gate line. The kickback slice is defined as a portion having a level lower than a gate-on voltage level in a gate pulse of the gate signal.

Abstract: A method of driving a display device including a display panel is provided. The display panel includes a plurality of gate lines. The gate lines are divided into a plurality of gate line groups. The method includes applying different gate delay values to each of the gate line groups to generate gate signals and outputting the gate signals to the gate lines. A first gate delay value is applied to at least one of the gate lines during a first frame and a second gate delay value different from the first delay value is applied to the at least one of the gate lines during a second frame.

Abstract: A display panel includes a plurality of pixels positioned in the display area, a pixel driver connected with two or more of the plurality of pixels and configured to drive the connected pixels, and a plurality of signal lines configured to transfer signals to the pixel driver, in which at least one of the plurality of signal lines overlaps the pixel driver.