Abstract: A capacitor component includes a body including a dielectric layer and an internal electrode layer, and an external electrode disposed on the body and connected to the internal electrode layer. The dielectric layer includes dielectric grains, at least a portion of the dielectric grains has a core-shell structure, and a shell of the core-shell structure contains a rare earth element having an average concentration of more than 0.5 at %.

Abstract: A gas capture system includes a first heat exchanger that exchanges heat between cold heat of a fuel that is vaporizing and a first gas mixture to cool the first gas mixture, a first dehumidifier that dehumidifies the first gas mixture cooled through the first heat exchanger, a first compressor that presses the first gas mixture passing through the first dehumidifier, a first separation device that separates a second gas mixture including a reference gas from the pressed first gas mixture, and a liquefier that liquefies the reference gas to generate a reference liquid.

Abstract: A multilayer electronic component includes: a body including a capacitance forming portion in which dielectric layers and internal electrodes are alternately disposed in a first direction, and cover portions disposed on an upper surface and a lower surface of the capacitance forming portion, respectively, in the first direction; and external electrodes disposed on the body, wherein the cover portion includes a plurality of dielectric grains and a plurality of pores, and Gn/Pn is more than 10 and less than 30, in which Gn is the number of dielectric grains included in the cover portion and Pn is the number of pores included in the cover portion.

Abstract: A camera module includes a housing, a lens holder configured to move in the housing in an optical axis direction, and a lens barrel coupled to the lens holder, wherein the lens holder includes a first support structure extending from one side surface in the optical axis direction and a second support structure located on a side surface opposite to the first support structure and extending in the optical axis direction, and the first support structure includes an extension protruding beyond the second support structure in the optical axis direction.

Abstract: Disclosed is a small animal intraventricular injection compensator for injecting a drug into a desired location through a syringe, the compensator including: a guide part provided with a guide hole into which a needle of a syringe is inserted; a body comprising an upper cavity provided inside thereof and a cradle provided to seat the guide part on an upper side thereof; and a fixation part integrally provided with the body or separately provided, and comprising a lower cavity provided to allow a head accommodation space, which a head of a small animal may enter into or exit from, to be provided inside thereof by corresponding to the upper cavity.

Abstract: A method for manufacturing a flavor capsule of tobacco according to an embodiment of the present disclosure may comprise: a membrane manufacturing step for manufacturing a membrane of a flavor capsule by a membrane manufacturing part that manufactures a membrane; a capsule manufacturing step for manufacturing the flavor capsule using an apparatus for manufacturing a capsule with the membrane manufactured during the membrane manufacturing step and a flavored liquid to be held in the membrane; and a hardening step for hardening the flavor capsule.

Abstract: Proposed are a wafer heating apparatus and a wafer processing apparatus using the same. More particularly, proposed are a wafer heating apparatus having an improved structure to enable efficient cooling of a terminal block, and a wafer processing apparatus using the same. A wafer heating apparatus for heating a wafer according to one embodiment includes a heater disposed below the wafer and configured to serve as a heat source, a cooling plate disposed below the heater and configured to provide cool air, and a terminal block configured to supply power to the heater and having a lower end portion in contact with the cooling plate.

Abstract: A pseudo SRAM capable of performing a page write mode is disclosed. The pseudo SRAM performs a page write according to a specified edge of a write command signal in a state that a word line is continuously activated without an intermediate pre-charge after one row activation in a column address corresponding to a predetermined page width. Then, the pseudo SRAM internally performs a self-refresh according to its characteristics. If a refresh request signal precedes a write command, it terminates the refresh, and if the pre-charge is operated, it performs a write operation. If the refresh request signal follows the write command, it terminates the write mode by releasing the chip select, and if the pre-charge is operated, it performs the refresh operation.

Abstract: Our semiconductor memory device has row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being divisionally arranged in memory blocks with the same number. The semiconductor memory device has a plurality of memory blocks each including the predetermined number of redundant wordlines, a plurality of row repair fuse boxes being divisionally arranged with the same number respective in the memory blocks, the number of the row repair fuse boxes being identical to the number of the redundant wordlines, and repair means to replace defective wordlines with the redundant wordlines.

Abstract: The disclosure is a semiconductor memory device cooperated with row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being arranged in a specific cell array block. The semiconductor memory device includes a plurality of memory blocks at least one of which includes a plurality of redundant wordlines; a plurality of row repair fuse boxes the number of which is the same with the number of the redundant wordlines, the fuse boxes being divisionally arranged with the same number respective in the memory blocks; and repair means to repair a defective wordline with the redundant wordline, the redundant wordlines corresponding to the row repair fuse boxes each by each.

Abstract: Our semiconductor memory device has row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being divisionally arranged in memory blocks with the same number. The semiconductor memory device has a plurality of memory blocks each including the predetermined number of redundant wordlines, a plurality of row repair fuse boxes being divisionally arranged with the same number respective in the memory blocks, the number of the row repair fuse boxes being identical to the number of the redundant wordlines, and repair means to replace defective wordlines with the redundant wordlines.

Abstract: The disclosure is a semiconductor memory device cooperated with row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being arranged in a specific cell array block. The semiconductor memory device includes a plurality of memory blocks at least one of which includes a plurality of redundant wordlines; a plurality of row repair fuse boxes the number of which is the same with the number of the redundant wordlines, the fuse boxes being divisionally arranged with the same number respective in the memory blocks; and repair means to repair a defective wordline with the redundant wordline, the redundant wordlines corresponding to the row repair fuse boxes each by each.

Abstract: An internal voltage fall-down circuit includes a reference voltage generating section for variably generating an optimum reference voltage level of which is compensated for depending on changes in the present reference voltage before fuse blowing, a reference voltage transforming section for receiving the reference voltage from the reference voltage generating section and then transforming the reference voltage into voltage for a normal mode or a stress mode which are presently set, and a driver section for providing a signal from the reference voltage transforming section to an internal circuit as an internal supply voltage.

Abstract: A voltage down converter for converting an external power voltage into an internal power voltage and providing the internal power voltage to an internal circuitry, comprising: a reference voltage generation means for receiving the external power voltage and generating a constant reference voltage where variation of the external power voltage and change of circumstance temperature are compensated; a reference voltage converting means for converting the reference voltage from the reference voltage generation means into a reference voltage for stress mode or a reference voltage for normal mode; and a driving means for receiving the reference voltage from the reference voltage converting means to generate the internal power voltage required to operation of the internal circuitry.