Abstract: The present application discloses a method for determining a delay between signals, an apparatus, a device and a storage medium, and relates to voice technology. In the method, apparatus, device, and storage medium provided by the present disclosure, by performing down-sampling processing on the signals, the amount of calculation for determining the delay can be reduced, thereby improving the determination efficiency. Moreover, signal segments including alignment positions of the two signals can be estimated in the signal through a currently determined delay, and then the processing can be performed again on the signal segments. In this way, a range for determination can be gradually reduced, that is, an accurate delay can be obtained by just processing shorter signals, which not only ensures the accuracy of the determination, but also reduces the amount of data processing.

Abstract: The present application discloses a method for determining a delay between signals, an apparatus, a device and a storage medium, and relates to voice technology. In the method, apparatus, device, and storage medium provided by the present disclosure, by performing down-sampling processing on the signals, the amount of calculation for determining the delay can be reduced, thereby improving the determination efficiency. Moreover, signal segments including alignment positions of the two signals can be estimated in the signal through a currently determined delay, and then the processing can be performed again on the signal segments. In this way, a range for determination can be gradually reduced, that is, an accurate delay can be obtained by just processing shorter signals, which not only ensures the accuracy of the determination, but also reduces the amount of data processing.

Abstract: This application discloses a voice recognition method, a voice recognition apparatus, an electronic device and a computer readable storage medium, and relates to the field of voice recognition technology. A specific implementation is: performing a latency estimation according to a first microphone signal and a first reference signal in a preset time period to obtain a latency value; acquiring a system audio signal, and processing the system audio signal by using the latency value to obtain a second reference signal; performing de-noising processing on a collected second microphone signal according to the second reference signal, to obtain a to-be-recognized voice signal; and performing recognition on the to-be-recognized voice signal.

Abstract: The present invention discloses an immersion type heat dissipation cooling liquid for power lithium battery and a method for preparing thereof. It is composed of 30 parts to 70 parts of hydrofluoroether compound, 30 parts to 50 parts of halogenated hydrocarbon, 1 part to 10 parts of alcohol compound, 0.01 parts to 0.5 parts of antioxidant, 0.01 parts to 0.5 parts of preservative, and 0.01 parts to 0.5 parts of nano metal oxide. The present invention mainly includes the hydrofluoroether compound, which is mixed with the halogenated hydrocarbon, the alcohol and other compounds to form an azeotrope, and is supplemented with antioxidant, preservative and non-conductive nano metal oxide additive to form a cooling liquid composition. The present invention can quickly realize the heat transfer effect, effectively solve the problem of heat generation and heat dissipation of the power lithium battery.

Abstract: A Dynamic Random Access Memory (DRAM) controller includes a memory interface and a processor. The memory interface is configured to communicate with a DRAM including one or more memory banks. The processor is configured to receive Input/Output (I/O) commands, each I/O command addressing a respective memory bank and a respective row within the memory bank to be accessed in the DRAM, to further receive one or more indications, indicative of likelihoods that a subsequent I/O command will address a same row in a same memory bank as a previous I/O command, to adaptively set, based on the indications, a policy of deactivating rows of the DRAM, and to execute the I/O commands in the DRAM in accordance with the policy.

Abstract: A Dynamic Random Access Memory (DRAM) controller includes a memory interface and a processor. The memory interface is configured to communicate with a DRAM including one or more memory banks. The processor is configured to receive Input/Output (I/O) commands, each I/O command addressing a respective memory bank and a respective row within the memory bank to be accessed in the DRAM, to further receive one or more indications, indicative of likelihoods that a subsequent I/O command will address a same row in a same memory bank as a previous I/O command, to adaptively set, based on the indications, a policy of deactivating rows of the DRAM, and to execute the I/O commands in the DRAM in accordance with the policy.