Patents by Inventor Junichi Morinaga

Junichi Morinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105735
    Abstract: In an array substrate, a plurality of wiring lines include a first wiring line located between a first pixel electrode and a second pixel electrode in a first direction, and a second wiring line located between a third pixel electrode and a fourth pixel electrode in the first direction. A plurality of switching elements include a first switching element and a second switching element. A plurality of common electrodes include a first common electrode overlapping the first pixel electrode, the second pixel electrode, the third pixel electrode, the first wiring line, and a first semiconductor portion, and a second common electrode overlapping the fourth pixel electrode and the second wiring line. Further, there is provided a first overlapping portion that is disposed overlapping a second semiconductor portion and has the same potential as that of any of the plurality of common electrodes.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 28, 2024
    Inventors: Hikaru YOSHINO, Shingo KAMITANI, Junichi MORINAGA
  • Patent number: 11914255
    Abstract: A wiring board includes position detection lines, position detection electrodes, a line, connection lines, and a short-circuit line. The position detection lines extend along a first direction and transmit at least position detection signals. The position detection electrodes are arranged at intervals with respect to the first direction and connected to the position detection lines. The line is disposed between the position detection electrodes that are adjacent to each other with respect to the first direction and the line extends in a second direction that crosses the first direction. The connection lines extend along the first direction and are connected to the position detection electrodes. The connection lines are arranged at intervals with respect to the second direction. The short-circuit line extends along the second direction and overlaps the line via an insulating film and is connected to the connection lines.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: February 27, 2024
    Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
    Inventors: Junichi Morinaga, Hikaru Yoshino
  • Publication number: 20230288766
    Abstract: A display device includes an array substrate, a counter substrate, a first pixel electrode, a second pixel electrode spaced apart from the first pixel electrode in a first direction, a third pixel electrode spaced apart from the second pixel electrode in the first direction, a first wiring line positioned between the first pixel electrode and the second pixel electrode and extending in a second direction intersecting the first direction, a second pixel electrode row including the second pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a third pixel electrode row including the third pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a first insulating film disposed on a lower-layer side of the first wiring line, and a spacer protruding from the counter substrate toward the array substrate.
    Type: Application
    Filed: March 3, 2023
    Publication date: September 14, 2023
    Inventors: Hikaru YOSHINO, Junichi MORINAGA
  • Publication number: 20230251530
    Abstract: A display device includes an array substrate, a counter substrate facing the array substrate at an interval therebetween, a plurality of pixels constituted by the plurality of pixel electrodes and the plurality of color filters, and a plurality of thin film transistors. The plurality of pixels include a plurality of first pixels each having the highest relative luminous efficiency, a plurality of second pixels each having the lowest relative luminous efficiency, and a plurality of third pixels each having relative luminous efficiency lower than the relative luminous efficiency of the first pixels and higher than the relative luminous efficiency of the second pixels, a plurality of spacers include a plurality of spacers having different overlapping relationships with the thin film transistors being overlapping targets.
    Type: Application
    Filed: January 11, 2023
    Publication date: August 10, 2023
    Inventors: Junichi MORINAGA, Hikaru YOSHINO
  • Publication number: 20230205016
    Abstract: A liquid crystal panel includes an array substrate, a counter substrate disposed to face the array substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate, in which the array substrate is provided with a plurality of pixel electrodes aligned at intervals in a plane of the array substrate, a common electrode disposed to overlap the plurality of pixel electrodes, an insulating film disposed on an upper layer side of the common electrode, and an alignment film disposed on an upper layer side of the insulating film, a light blocking portion and a spacer are provided in the counter substrate, the light blocking portion separating the plurality of pixel electrodes, the spacer being disposed to overlap the light blocking portion and protruding to the liquid crystal layer side from the counter substrate, the alignment film is connected to the common electrode directly or via another member through an opening provided in the insulating film, and the opening is disposed at
    Type: Application
    Filed: December 16, 2022
    Publication date: June 29, 2023
    Inventors: Junichi MORINAGA, Hikaru YOSHINO
  • Patent number: 11668985
    Abstract: The present invention provides a liquid crystal display device provided with an in-cell touch panel, capable of reducing or preventing color mixing in an oblique view while reducing or preventing a reduction in transmittance, and of reducing or preventing a reduction in display quality. The liquid crystal display device includes: a first substrate; a second substrate facing the first substrate; and a liquid crystal layer between the first substrate and the second substrate. The first substrate includes: a thin-film transistor; a pixel electrode connected to the thin-film transistor; a color filter layer including color filters of multiple colors; a touch panel line on a liquid crystal layer side of the color filter layer; and a flattening film on a liquid crystal layer side of the touch panel line.
    Type: Grant
    Filed: September 6, 2021
    Date of Patent: June 6, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga
  • Patent number: 11640089
    Abstract: A liquid crystal display device comprises a first substrate; a second substrate opposite the first substrate; a liquid crystal layer between the first substrate and the second substrate; and an active area including: a matrix of first regions; and a plurality of second regions distributed so as not to overlap the first regions, wherein each first region includes a switching element and is supplied with a grayscale signal via the switching element, and the plurality of second regions includes no switching element and is supplied with a common signal.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 2, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shogo Suzuki, Junichi Morinaga
  • Publication number: 20230112631
    Abstract: An active matrix substrate includes a substrate in which a notch or an aperture is formed, and electrodes. Each electrode includes at least either of: a capacitor forming portion that is arranged in a region other than a bypass region and overlaps with at least one of a plurality of bypass gate lines when viewed in a plan view; and an electrode layer portion that is formed in an electrode layer and that composes a bypass gate line interposed portion together with a source line layer portion formed in a source line layer in the bypass region. The electrode layer portion and the source line layer portion overlap with at least one of the bypass gate lines in the bypass region when viewed in a plan view, and at least one of the bypass gate lines is positioned between the electrode layer portion and the source line layer portion in a normal line direction of the substrate.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 13, 2023
    Inventors: Hikaru YOSHINO, Satoshi HORIUCHI, Junichi MORINAGA
  • Patent number: 11625114
    Abstract: An array substrate includes gate lines, source lines, switching components, position detecting electrodes, a light blocking portion, and position detecting lines. The position detecting electrodes are disposed in a layer lower than the gate lines and the source lines to detect input positions at which the position input operation is performed with a position input body based on electrostatic capacitances between the position input body and the position detecting electrodes. The light blocking portion is disposed in a layer lower than channel regions of the switching components and opposite the channel regions with a lower insulating film between the light blocking portion and the channel regions. The position detecting lines are formed from sections of a conductive film from which the light blocking portion is formed and coupled to the position detecting electrodes.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: April 11, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga
  • Patent number: 11520199
    Abstract: A display device includes: a capacitance wire; a first pixel electrode disposed so as to be adjacent to the capacitance wire; a second pixel electrode disposed so that the capacitance wire is located between the first pixel electrode and the second pixel electrode; a first capacitance forming electrode connected to the first pixel electrode and disposed so as to overlap the capacitance wire via an insulating film; and a shield electrode disposed so as to be located between the first pixel electrode and the second pixel electrode and so as to at least partially overlap the first capacitance forming electrode via an insulating film.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: December 6, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Junichi Morinaga, Masahiro Yoshida
  • Publication number: 20220326583
    Abstract: A wiring board includes position detection lines, position detection electrodes, a line, connection lines, and a short-circuit line. The position detection lines extend along a first direction and transmit at least position detection signals. The position detection electrodes are arranged at intervals with respect to the first direction and connected to the position detection lines. The line is disposed between the position detection electrodes that are adjacent to each other with respect to the first direction and the line extends in a second direction that crosses the first direction. The connection lines extend along the first direction and are connected to the position detection electrodes. The connection lines are arranged at intervals with respect to the second direction. The short-circuit line extends along the second direction and overlaps the line via an insulating film and is connected to the connection lines.
    Type: Application
    Filed: March 3, 2022
    Publication date: October 13, 2022
    Inventors: Junichi MORINAGA, Hikaru YOSHINO
  • Publication number: 20220137740
    Abstract: An array substrate includes gate lines, source lines, switching components, position detecting electrodes, a light blocking portion, and position detecting lines. The position detecting electrodes are disposed in a layer lower than the gate lines and the source lines to detect input positions at which the position input operation is performed with a position input body based on electrostatic capacitances between the position input body and the position detecting electrodes. The light blocking portion is disposed in a layer lower than channel regions of the switching components and opposite the channel regions with a lower insulating film between the light blocking portion and the channel regions. The position detecting lines are formed from sections of a conductive film from which the light blocking portion is formed and coupled to the position detecting electrodes.
    Type: Application
    Filed: October 15, 2021
    Publication date: May 5, 2022
    Inventor: JUNICHI MORINAGA
  • Patent number: 11307701
    Abstract: A display device including a position input function, includes a pixel electrode; an image wire that is disposed adjacent to the pixel electrode and supplies an image signal to the pixel electrode; a plurality of position detection wires that are arranged side by side on at least one side of the image wire; and a plurality of position detection electrodes that are connected to the plurality of position detection wires, form a capacitance with a position input body performing position input, detect an input position by the position input body, and include an opening portion which overlaps with the plurality of position detection wires arranged on the at least one side of the image wire and is formed in a range straddling the plurality of position detection wires.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: April 19, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga
  • Publication number: 20220100043
    Abstract: The present invention provides a liquid crystal display device provided with an in-cell touch panel, capable of reducing or preventing color mixing in an oblique view while reducing or preventing a reduction in transmittance, and of reducing or preventing a reduction in display quality. The liquid crystal display device includes: a first substrate; a second substrate facing the first substrate; and a liquid crystal layer between the first substrate and the second substrate. The first substrate includes: a thin-film transistor; a pixel electrode connected to the thin-film transistor; a color filter layer including color filters of multiple colors; a touch panel line on a liquid crystal layer side of the color filter layer; and a flattening film on a liquid crystal layer side of the touch panel line.
    Type: Application
    Filed: September 6, 2021
    Publication date: March 31, 2022
    Inventor: JUNICHI MORINAGA
  • Publication number: 20220057682
    Abstract: A liquid crystal display device comprises a first substrate; a second substrate opposite the first substrate; a liquid crystal layer between the first substrate and the second substrate; and an active area including: a matrix of first regions; and a plurality of second regions distributed so as not to overlap the first regions, wherein each first region includes a switching element and is supplied with a grayscale signal via the switching element, and the plurality of second regions includes no switching element and is supplied with a common signal.
    Type: Application
    Filed: August 17, 2021
    Publication date: February 24, 2022
    Inventors: SHOGO SUZUKI, JUNICHI MORINAGA
  • Patent number: 11156888
    Abstract: An active matrix substrate includes a plurality of gate wiring lines extending in a row direction and a plurality of source wiring lines extending in the column direction and a plurality of touch wiring lines extending in the column direction, wherein a pair of gate wiring lines are connected to one pixel row and one source wiring line is connected to a pair of pixel columns, the pair of pixel columns includes a first pixel column and a second pixel column adjacent to the first pixel column, and when viewed from a normal direction of a main surface of the substrate, each source wiring line is disposed between the first pixel column and the second pixel column in the corresponding pair of pixel columns, and each touch wiring line is disposed between two adjacent pixel columns between two adjacent source wiring lines.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 26, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga
  • Publication number: 20210318582
    Abstract: A display device includes: a capacitance wire; a first pixel electrode disposed so as to be adjacent to the capacitance wire; a second pixel electrode disposed so that the capacitance wire is located between the first pixel electrode and the second pixel electrode; a first capacitance forming electrode connected to the first pixel electrode and disposed so as to overlap the capacitance wire via an insulating film; and a shield electrode disposed so as to be located between the first pixel electrode and the second pixel electrode and so as to at least partially overlap the first capacitance forming electrode via an insulating film.
    Type: Application
    Filed: April 6, 2021
    Publication date: October 14, 2021
    Inventors: Junichi MORINAGA, Masahiro YOSHIDA
  • Publication number: 20210278921
    Abstract: A display device including a position input function, includes a pixel electrode; an image wire that is disposed adjacent to the pixel electrode and supplies an image signal to the pixel electrode; a plurality of position detection wires that are arranged side by side on at least one side of the image wire; and a plurality of position detection electrodes that are connected to the plurality of position detection wires, form a capacitance with a position input body performing position input, detect an input position by the position input body, and include an opening portion which overlaps with the plurality of position detection wires arranged on the at least one side of the image wire and is formed in a range straddling the plurality of position detection wires.
    Type: Application
    Filed: February 24, 2021
    Publication date: September 9, 2021
    Inventor: Junichi MORINAGA
  • Patent number: 11079644
    Abstract: An active matrix substrate of a liquid crystal display device includes a first substrate, a light blocking layer, a lower insulating layer, a pixel TFT, a source wiring line, a pixel electrode, and a common electrode. The pixel TFT includes an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, and first and second low-resistive regions. The source wiring line is located between the main surface of the first substrate and the lower insulating layer, and is formed from a conductive film the same as the light blocking layer. The pixel electrode is formed from an oxide film the same as the oxide semiconductor layer, and is continuous with the second low-resistive region. The active matrix substrate further includes a connection electrode that is formed from a transparent conductive film the same as the common electrode and connects the source wiring line to the first low-resistive region.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: August 3, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga
  • Patent number: 11067863
    Abstract: A liquid crystal panel includes a first substrate and a second substrate. The first substrate includes a plurality of first wires, a second wire that intersects with the plurality of first wires, and a third wire that is arranged in a layer different from a layer in which the second wire is arranged and that is arranged in parallel to the second wire. An aperture is formed in at least any of all intersection portions in which the plurality of first wires and the second wire intersect. The second wire and the third wire are connected through a contact hole that is formed in the aperture.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: July 20, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Morinaga