Abstract: Provided is a parallel processing device whereby a plurality of single processes is efficiently and simply parallel processed by a plurality of processors. The parallel processing device includes: a first processor which executes, upon data which is included in data sets, a first program which defines a single process which is executed with the data as an input thereof, and outputs a first result; and includes a second processor which executes, upon the inputted data, a second program which defines a unit process and outputs a second result. A selection unit selects, based on a prescribed index which denotes either performance or function of the first processor and the second processor, a first partial set and a second partial set from the data set. A first processor control unit inputs into the first processor first data which is included in the first partial set. A second processor control unit inputs into the second processor second data which is included in the second partial set.

Abstract: Provided is a parallel processing device whereby a plurality of single processes is efficiently and simply parallel processed by a plurality of processors. The parallel processing device includes: a first processor which executes, upon data which is included in data sets, a first program which defines a single process which is executed with the data as an input thereof, and outputs a first result; and includes a second processor which executes, upon the inputted data, a second program which defines a unit process and outputs a second result. A selection unit selects, based on a prescribed index which denotes either performance or function of the first processor and the second processor, a first partial set and a second partial set from the data set. A first processor control unit inputs into the first processor first data which is included in the first partial set. A second processor control unit inputs into the second processor second data which is included in the second partial set.

Abstract: For flexibly setting up an execution environment according to contents of processing to be executed while taking stability or a security level into consideration, the multiple processor system includes the execution environment main control unit 10 which determines CPU assignment at the time of deciding CPU assignment, the execution environment sub control unit 20 which controls starting, stopping and switching of an execution environment according to an instruction from the execution environment main control unit 10 to synchronize with the execution environment main control unit 10, and the execution environment management unit 30 which receives input of management information or reference refusal information of shared resources for each CPU 4 or each execution environment 100 to separate the execution environment main control unit 10 from the execution environment sub control units 20a through 20n, or the execution environment sub control units 20a through 20n from each other.

Abstract: Disclosed is an automatic optimization system capable of searching for an allocation with a good performance from among a plurality of task allocations which can be scheduled in a system of a development target configured with a plurality of periodic tasks. A task allocation optimization system for a multi-core processor including a plurality of cores calculates a response time of each of a plurality of tasks which are core allocation decision targets, and outputs an accumulative value of the calculated response time as an evaluation function value which is an index representing excellence of a task allocation. A task allocation from which a good evaluation function value is calculated is searched based on the evaluation function value. A candidate having a good evaluation function value among a plurality of searched task allocation candidates is held.

Abstract: A schedule decision method acquires dependencies of execution sequences required for a plurality of sub tasks into which a first task has been divided; generates a plurality of sub task structure candidates that satisfy said dependencies and for which a plurality of processing devices execute said plurality of sub tasks; generates a plurality of schedule candidates by further assigning at least one second task to each of said sub task structure candidates; computes an effective degree that represents effectiveness of executions of said first task and said second task for each of said plurality of schedule candidates; and decides a schedule candidate used for the executions of said first task and said second task from said plurality of schedule candidates based on said effective degrees.

Abstract: There is provided a trace/failure observation system which is capable of comprehensive collection of information that is needed for checking a desired operation in a system or the like where the amount of information to be observed is large, and which allows easy analysis of the desired operation. The system includes, in a system LSI to be subjected to trace/failure observation: an event detecting means for observing behavior of a portion to be observed; a first data reducing means for performing observation data reduction processing so that observation data from the event detecting means has an amount of information processable to a second data reducing means; and the second data reducing means for performing one or more steps of observation data reduction processing.

Abstract: Provided is a performance optimization system that can identify a case where the impact on performance is large even when the number of cache misses is small.

Abstract: In a multiprocessor system with a plurality of Operating Systems (OSs) running thereon, each of the plurality of OSs has a device driver which accesses devices for shared use among the OSs. Each device driver has a task interface part which performs inter-Operating System communication at the Operating System (OS) kernel layer. A first device driver on one of the plurality of OSs includes a device interface part which accesses a device to be operated by a second device driver on a second one of the plurality of OSs. The task interface part of the second device driver receives a device access request from a task running on the second one of the plurality of OSs, adds processing request data to a request queue list of the first device driver, and returns a device access result to the task upon receipt of a notification from the device interface part.

Abstract: A device and a method are provided for increasing processing speed and for ensuring system security when an application or a driver is added. The device includes a first CPU group that executes software composed of basic processing and an OS; a second CPU group that executes software composed of additional processing and OS corresponding to the additional processing, inter-processor communication means used for communication between the first CPU and the second CPU, and access control means that controls access made by the second CPU to a memory and/or an input/output device.

Abstract: Upon receiving debugging program activation instructions sent from a communication port (1), debugging program activation instruction distribution units (61 and 71) distribute the received debugging program activation instructions to execution units designated by these activation instructions. Debugging program activation units (62 and 72) are provided for each execution unit (A and B) and, based on the activation instructions distributed by the activation instruction distribution units (61 and 71), activate debugging programs (63 and 73) on the execution units designated by these activation instructions.

Abstract: Provided is an information processing device which enables transfer of an execution environment in a short time period without degrading basic performance of an execution environment and without requiring a large amount of memory. The information processing device comprises a basic side CPU 100 for executing basic processing and an addition side CPU 200 for executing additional processing, in which a transfer management unit 300 provided on the basic side CPU 100 transfers execution environment data 1000 including constitution information of an execution environment 30 of the additional processing to be executed on the addition side CPU and data in a memory corresponding to the execution environment to other information processing device and restores the execution environment to re-start the addition side CPU based on the received execution environment data 1000.

Abstract: On a parallel processing system by an OS for single processors which operates, on a multiprocessor, an OS for single processors and an existing application to realize parallel processing by the multiprocessor with respect to the application, each processor includes a communication proxy unit which transfers data between tasks spreading over the processors by proxy and the communication proxy unit on a processor in which a task on a transmission side operates holds information about an address, on a processor, of a task on a reception side to receive data transferred from the task on the transmission side as proxy for the task on the reception side.

Abstract: Provided is the access control system for controlling an access on a task basis without modifying a device side to be accessed and without applying a task ID at each access to a device. The access filter system for controlling an access between devices mounted on an electronic device, which comprises the access control unit for applying a unique device key set for each device as a right to access the device on a basis of a task operable on the electronic device and determining whether to allow an access to the device according to whether an access request task which requests an access to the device has the device key.

Abstract: The information processing device which recovers a domain developing a fault caused by added application and device driver while maintaining security and reliability includes a plurality of processors, wherein the plurality of processors form a plurality of domains according to processing contents to be executed, and the processors in different domains communicate with each other through a communication unit, and which further includes a recovery unit for executing, for a domain developing a fault, failure recovery processing based on a failure recovery request notified by the domain and a recovery condition set in advance for each domain.

Abstract: Disclosed is an automatic optimization system capable of searching for an allocation with a good performance from among a plurality of task allocations which can be scheduled in a system of a development target configured with a plurality of periodic tasks. A task allocation optimization system for a multi-core processor including a plurality of cores calculates a response time of each of a plurality of tasks which are core allocation decision targets, and outputs an accumulative value of the calculated response time as an evaluation function value which is an index representing excellence of a task allocation. A task allocation from which a good evaluation function value is calculated is searched based on the evaluation function value. A candidate having a good evaluation function value among a plurality of searched task allocation candidates is held.

Abstract: A schedule decision method acquires dependencies of execution sequences required for a plurality of sub tasks into which a first task has been divided; generates a plurality of sub task structure candidates that satisfy said dependencies and for which a plurality of processing devices execute said plurality of sub tasks; generates a plurality of schedule candidates by further assigning at least one second task to each of said sub task structure candidates; computes an effective degree that represents effectiveness of executions of said first task and said second task for each of said plurality of schedule candidates; and decides a schedule candidate used for the executions of said first task and said second task from said plurality of schedule candidates based on said effective degrees.

Abstract: A program parallelization apparatus which generates a parallelized program of shorter parallel execution time is provided. The program parallelization apparatus inputs a sequential processing intermediate program and outputs a parallelized intermediate program. In the apparatus, a thread start time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution start time of each thread. A thread end time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution end time of each thread. An occupancy status analysis part analyzes a time not occupied by already-scheduled instructions. A dependence delay analysis part analyzes an instruction-allocatable time based on a delay resulting from dependence between instructions. A schedule candidate instruction select part selects a next instruction to schedule. An instruction arrangement part allocates a processor and time to execute to an instruction.

Abstract: Provided is a performance optimization system that can identify a case where the impact on performance is large even when the number of cache misses is small.

Abstract: With a system in which a plurality of OSs run on a multi-core processor and which is based on a client-server approach where one OS performs device access on behalf of the other OSs, if a device is to be accessed from tasks on the plurality of OSs, there have been problems of a reduction in performance and an increase in design and manufacturing cost due to the necessity of providing proxy servers. In a multiprocessor system with a plurality of OSs 40, 50 running thereon, each of the plurality of OSs has a device driver 41, 51 which accesses devices for shared use among the OSs, wherein the device driver has at least either of a device interface part 45 or a task interface part 44, 54 which performs inter-OS communication at the OS kernel layer, and wherein the device interface part 45 accesses a device 14 to be operated by the device driver and the task interface part receives a device access request from a task running on each OS and returns a device access result to the task.

Abstract: There is provided a trace/failure observation system which is capable of comprehensive collection of information that is needed for checking a desired operation in a system or the like where the amount of information to be observed is large, and which allows easy analysis of the desired operation. The system includes, in a system LSI to be subjected to trace/failure observation: an event detecting means for observing behavior of a portion to be observed; a first data reducing means for performing observation data reduction processing so that observation data from the event detecting means has an amount of information processable to a second data reducing means; and the second data reducing means for performing one or more steps of observation data reduction processing.