Abstract: [Problem]: The problem of the present invention is to provide a stacked structure excellent in stability of atomic arrangement, a method of manufacturing same, and a semiconductor device using the stacked structure. [Solution]: The stacked structure of the present invention is characterized in that it has an alloy layer A having germanium and tellurium as a main component and an alloy layer B having tellurium and either of antimony or bismuth as a main component, and at least either of the alloy layer A or the alloy layer B contains at least either of sulfur or selenium as a chalcogen atom.

Abstract: A method of initializing a multiferroic element for obtaining a stable element operation includes applying at least one selected from a group consisting of an electric field and a magnetic field to the multiferroic element under a temperature condition equal to or higher than a phase transition temperature. The multiferroic element has a laminated structural body including a first alloy layer and a second alloy layer. The first alloy layer is formed by using any of antimony-tellurium, bismuth-tellurium and bismuth-selenium as a principal component. The second alloy layer is laminated on the first alloy layer, and formed by using a compound represented by the following general formula (1) as a principal component. The second alloy layer is configured to undergo phase transition between a reset phase and a set phase. Electric polarization is not caused in the reset phase, but caused in the set phase.

Abstract: A crystal orientation layer laminated structure capable of widely selecting materials for a base substrate and an electrode substrate, an electronic memory using the crystal orientation layer laminated structure and a method for manufacturing the crystal orientation layer laminated structure are provided. The crystal orientation layer laminated structure according to the present invention has such a feature as including a substrate, including an orientation control layer which is laminated on the substrate, which is made of any of germanium, silicon, tungsten, germanium-silicon, germanium-tungsten and silicon-tungsten, and whose thickness is at least 1 nm or more, and including a first crystal orientation layer which is laminated on the orientation control layer, which is made of any of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe and Bi2Se3 as a main component, and which is oriented in a certain crystal orientation.

Abstract: A spin electronic memory of the present invention includes: a pair of electrodes 1, 2, recording layers 6a, 6b, and 6c between the electrodes 1 and 2, the recording layer being formed by laminating first alloy layer 5 and second alloy layer 4, the first alloy layer 5 being formed to contain any one of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe, and Bi2Se3 as a principal component and to have a thickness of 2 nm to 10 nm, the second alloy layer 4 being formed to contain an alloy expressed by general formula (1) as a principal component; and spin injection layer 7 formed with a magnetic material to inject a spin into the recording layer with the magnetic material being magnetized, M1-xTex??(1) where M represents an atom selected from atoms of Ge, Al, and Si, and x represents a value of 0.5 or more and less than 1.

Abstract: A method of initializing a multiferroic element for obtaining a stable element operation includes applying at least one selected from a group consisting of an electric field and a magnetic field to the multiferroic element under a temperature condition equal to or higher than a phase transition temperature. The multiferroic element has a laminated structural body including a first alloy layer and a second alloy layer. The first alloy layer is formed by using any of antimony-tellurium, bismuth-tellurium and bismuth-selenium as a principal component. The second alloy layer is laminated on the first alloy layer, and formed by using a compound represented by the following general formula (1) as a principal component. The second alloy layer is configured to undergo phase transition between a reset phase and a set phase. Electric polarization is not caused in the reset phase, but caused in the set phase.

Abstract: A memory device according to an embodiment includes an insulating layer containing silicon, an interface layer provided on the insulating layer and containing a chalcogenide compound of a transition metal, and a conductive layer provided on the interface layer, containing antimony or bismuth, and having a superlattice structure.

Abstract: A crystal orientation layer laminated structure capable of widely selecting materials for a base substrate and an electrode substrate, an electronic memory using the crystal orientation layer laminated structure and a method for manufacturing the crystal orientation layer laminated structure are provided.

Abstract: A spin electronic memory of the present invention includes: a pair of electrodes 1, 2, recording layers 6a, 6b, and 6c between the electrodes 1 and 2, the recording layer being formed by laminating first alloy layer 5 and second alloy layer 4, the first alloy layer 5 being formed to contain any one of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe, and Bi2Se3 as a principal component and to have a thickness of 2 nm to 10 nm, the second alloy layer 4 being formed to contain an alloy expressed by general formula (1) as a principal component; and spin injection layer 7 formed with a magnetic material to inject a spin into the recording layer with the magnetic material being magnetized, M1-xTex??(1) where M represents an atom selected from atoms of Ge, Al, and Si, and x represents a value of 0.5 or more and less than 1.

Abstract: A memory device according to an embodiment includes an insulating layer containing silicon, an interface layer provided on the insulating layer and containing a chalcogenide compound of a transition metal, and a conductive layer provided on the interface layer, containing antimony or bismuth, and having a superlattice structure.

Abstract: Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of the record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure with a thin film containing Sb and a thin film containing Te. The solid memory can realize the number of times of repeated recording and erasing of 1015.

Abstract: Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure of thin films including Ge and thin films including Sb. The solid memory can realize the number of times of repeated recording and erasing of 1015.

Abstract: A solid-state memory that requires a lower current during recording and erasing data and can repeatedly rewrite data an increased number of times. In at least one example embodiment, the solid-state memory includes a recording layer that includes a laminated structure in which electric properties are changed in response to a phase separation. The laminated structure includes a film containing an Sb atom(s) and a film containing a Ge atom(s), which films constitute a superlattice structure. In the laminated structure, phase separation of the film containing the Sb atom and the film containing the Ge atom allows data to be recorded and erased efficiently.

Abstract: A phase-change memory and a semiconductor recording reproducing device capable of reducing consumed power are provided. A SnxTe100-x/Sb2Te3 SL film obtained by depositing a SnxTe100-x film and a Sb2Te3 film layer by layer contains a SnTe/Sb2Te3 superlattice phase formed of SnTe and Sb2Te3, a SnSbTe alloy phase, and a Te phase. The SnTe/Sb2Te3 superlattice phase is diluted by the SnSbTe alloy phase and the Te phase. Here, X of the SnxTe100-x film is represented by 4 at. %?X?55 at. %.

Abstract: Allowing the rate of phase change to be controlled at the time period of phonons (approx. 270 fs) for the purpose of achieving a substantially higher recording-erasing speed compared to what can be achieved with conventional technologies relating to optical recording media using phase change. A femtosecond pulse laser is shaped into pulse trains each having a first pulse and a second pulse using a Michelson interferometer, and the time interval of first and second pulses is matched with the time period of lattice vibration of a material constituting the phase change recording film to be irradiated, thereby inducing phase change.

Abstract: A phase-change memory and a semiconductor recording/reproducing device capable of reducing consumed power are provided. A SnxTe100-x/Sb2Te3 SL film obtained by depositing a SnxTe100-x film and a Sb2Te3 film layer by layer contains a SnTe/Sb2Te3 superlattice phase formed of SnTe and Sb2Te3, a SnSbTe alloy phase, and a Te phase. The SnTe/Sb2Te3 superlattice phase is diluted by the SnSbTe alloy phase and the Te phase. Here, X of the SnxTe100-x film is represented by 4 at. %?X?55 at. %.

Abstract: An etching resist has a first heat-generating layer, a second heat-generating layer, and a metal compound layer including a metallic oxynitride layer containing a metallic oxynitride. The first heat-generating layer, the metallic oxynitride layer, and the second heat-generating layer are directly or indirectly laminated such that the metallic oxynitride layer is positioned between the first heat-generating layer and the second heat-generating layer.

Abstract: Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of the record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure with a thin film containing Sb and a thin film containing Te. The solid memory can realize the number of times of repeated recording and erasing of 1015.

Abstract: Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure of thin films including Ge and thin films including Sb. The solid memory can realize the number of times of repeated recording and erasing of 1015.

Abstract: A method of at least one embodiment of the present invention of manufacturing a solid-state memory is a method of manufacturing a solid-state memory, the solid-state memory including a recording film whose electric characteristics are varied by phase transformation, the method including: forming the recording film by forming a laminate of two or more layers so that a superlattice structure is provided, each of the layers having a parent phase which shows solid-to-solid phase-transformation, the recording film being formed at a temperature not lower than a temperature highest among crystallization temperatures of the parent phases. It is thus possible to manufacture a solid-state memory which requires lower current for recording and erasing data and has a greater rewriting cycle number.

Abstract: A solid memory may include a recording layer including Ge, Sb and Te as major components. The recording layer may include a superlattice. The recording layer may include multi-layers each having a parent phase showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer. The recording layer may include an Sb2Te3 layer that includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order, a GeTe layer that includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer, and an Sb layer that includes a plurality of Sb-atomic layers.