Abstract: A frequency control device capable of detecting a frame sync pattern and generating a frequency information accurately even if a reproduction signal is not zero-crossed, and an information reproduction apparatus having the same, which includes an oscillation circuit outputting a clock having a frequency corresponding to a control signal; a converter sampling an input analog signal having a predetermined pattern based on the clock and converting the same to a digital signal; and a frequency detection device detecting an object to be a sync pattern from a changing trend of the digital signal, generating a frequency information for controlling a reproduction clock based on the detected object to be the sync pattern, and outputting the same as the control signal to the oscillation circuit.

Abstract: A frequency control device capable of detecting a frame sync pattern and generating a frequency information accurately even if a reproduction signal is not zero-crossed, and an information reproduction apparatus having the same, which includes an oscillation circuit outputting a clock having a frequency corresponding to a control signal; a converter sampling an input analog signal having a predetermined pattern based on the clock and converting the same to a digital signal; and a frequency detection device detecting an object to be a sync pattern from a changing trend of the digital signal, generating a frequency information for controlling a reproduction clock based on the detected object to be the sync pattern, and outputting the same as the control signal to the oscillation circuit.

Abstract: A PLL circuit functioning as a clock recovery circuit in a tape recording and playback apparatus employing the PRML method has a level determining circuit for detecting that head output level (signal level) is at or lower than a certain level during track crossing for a high-speed search, and effects a hold on a loop filter according to a level determination output to thereby hold PLL operation, whereby the PLL behavior is not disturbed by a noise component occurring during track crossing. Thus, it is possible to stabilize search operation and increase the design margin.

Abstract: A nonlinearity compensation circuit is disclosed which includes an inverse hyperbolic function generation circuit for converting differential currents corresponding to input signals in+ and in− into differential voltages which increase in proportion to an inverse hyperbolic function, an offset provision circuit for providing an offset corresponding to control signals c+ and c− to the differential voltages outputted from the inverse hyperbolic function generation circuit and a hyperbolic function generation circuit for converting the differential voltages to which the offset has been provided by the offset provision circuit into signals which increase in proportion to a hyperbolic function and outputting the resulting signals as output signals out+ and out−. Consequently, compensation for the nonlinearity such as second order distortion can be performed for the read signal from a recording medium.

Abstract: A nonlinearity compensation circuit is disclosed which includes an inverse hyperbolic function generation circuit for converting differential currents corresponding to input signals in+ and in− into differential voltages which increase in proportion to an inverse hyperbolic function, an offset provision circuit for providing an offset corresponding to control signals c+ and c− to the differential voltages outputted from the inverse hyperbolic function generation circuit and a hyperbolic function generation circuit for converting the differential voltages to which the offset has been provided by the offset provision circuit into signals which increase in proportion to a hyperbolic function and outputting the resulting signals as output signals out+ and out−. Consequently, compensation for the nonlinearity such as second order distortion can be performed for the read signal from a recording medium.

Abstract: A PLL circuit functioning as a clock recovery circuit in a tape recording and playback apparatus employing the PRYL method has a level determining circuit for detecting that head output level (signal level) is at or lower than a certain level during track crossing for a high-speed search, and effects a hold on a loop filter according to a level determination output to thereby hold PLL operation, whereby the PLL behavior is not disturbed by a noise component occurring during track crossing. Thus, it is possible to stabilize search operation and increase the design margin.

Abstract: A track address pattern suitable for being applied to a magnetic disk apparatus which positions a head to a track with a desired address by a sector servo system, for example, wherein a gray code of a plurality of bits corresponding to a track address of the magnetic disk apparatus is divided per 2 bits thereof into groups, the respective groups of 2 bits are converted into codes of 3 bits (001), (010), (100) and (111) depending on the values thereof, respectively, whereby the converted codes are recorded on the magnetic disk as the track address pattern.

Abstract: A disc memory apparatus allows its magnetic head to reach a target track in a short period of time, wherein address data is recorded on each two-track width corresponding to each of the even-numbered and the odd-numbered tracks; either of two kinds of burst signals is recorded on each one-track width corresponding to each of the even-numbered and the odd-numbered tracks; the address of the record track is detected, based on the result of a comparison of two kinds of burst signals and the first address data, or in addition to this, the detected address data is further offset by the second address data; since the lengths of the servo sector areas required to detect the address data are shortened, the address data of the magnetic head are detected to a higher accuracy using a smaller number of reference signals; and the magnetic head can be moved at a fast speed, thus in a short period of time, resulting in a short seek time.

Abstract: The present invention provides a disc drive apparatus having an improved tracking control and seek time adjustment. The head tracking error distribution along the disc radius is determined with reference to the phases of a plurality of position sensors and is calculated based on the tracking error of a reference track in first and second reference regions with respect to the signal from one of the position sensors. This information is used to determine the tracking error distribution along the disc radius with respect to that one of the position sensors. The tracking error distribution is used to determine the tracking error of a reference track in a third reference region with respect to the signal from the same position sensor. This tracking error is used to determine the tracking error of other reference tracks in the third reference region with respect to the signals from other of the position sensors.

Abstract: A disk apparatus of zone-recording type having a plurality of recording zones is structured such that a plurality of reference clock signals, each corresponding to a recording zone, are generated in both a recording mode and a reproducing mode. A reference frequency signal means, for generating an oscillating signal of a reference frequency, is combined with a variable frequency forming phase locked circuit. A first switch selectively causes the phase locked circuit to perform the phase locking in response to the reference frequency signal generated from the reference signal means or the reproducing signal. A demultiplying means switches a demultiplying ratio according to the mode.

Abstract: A digital data detecting apparatus comprises means for sampling an input digital signal at a frequency which is M times (M>1) higher than a channel bit rate, means responsive to two adjacent sampled values for computing an interval from a point where the digital signal intersects a reference level to a sampling time, and means responsive to an output from the computing means for generating a data detecting signal for detecting data of the digital signal.

Abstract: A magnetic transducer head utilizing a thin film magneto-resistance effect element is disclosed in which the amount of a DC bias magnetic field is so selected that only the end portion of the thin film magneto-resistance effect element serving as a contact surface with a magnetic medium is effectively given with sensitivity and the element is saturated in the vicinity of its central portion in its width direction.

Abstract: A magnetic transducer head utilizing magnetoresistance effect is disclosed which includes a thin film magnetoresistance effect element held between, first and second substrates, at least one of the first and second substrates being formed of an electrically conductive material, and a biasing means for the magnetoresistance effect element to satisfy a potential relation V.sub.MR -V.sub.S .ltoreq.0.2 volt, wherein V.sub.MR is a potential of the magnetoresistance effect element, and V.sub.S is a potential of the conductive substrate.

Abstract: A public address system having a microphone, an amplifier which amplifies the output from the microphone and a speaker assembly which receives the output from the amplifier and reproduces a sound, in which the microphone is provided with a transmitter generating an electromagnetic wave and the speaker assembly has two receiving coils disposed perpendicular to each other. The outputs from the receiving coils are used to control the level of an audio signal applied to the speaker assembly and thereby to avoid the occurrence of howling.