Patents by Inventor Junko Onomura

Junko Onomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6455880
    Abstract: A high frequency semiconductor device has a semiconductor substrate such as the semi-insulating GaAs; a first metal layer disposed above the semiconductor substrate; a first dielectric thin film disposed on the first metal layer; and a second metal layer having a second metal strip disposed on the first dielectric thin film. Here, the first metal layer has a first metal strip, first and second ground metal plates sandwiching the first metal strip. And the first dielectric thin film is not disposed uniformly on the surface of the first ground metal plate so that the dielectric structure on the first metal strip differs from the dielectric structure under the second metal strip. The CPW is constituted by the first metal strip, the first and second ground metal plates, and the TFMSL is constituted by the second metal strip and the first ground metal plate.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: September 24, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Ono, Yuji Iseki, Keiichi Yamaguchi, Junko Onomura, Eiji Takagi