Patents by Inventor Junrong Yan

Junrong Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901327
    Abstract: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 13, 2024
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yang Lei, Xiaofeng Di, Yuyun Lou, Zhonghua Qian, Junrong Yan
  • Patent number: 11894343
    Abstract: A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 6, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Xianlu Cui, Junrong Yan, Wei Liu, Zhonghua Qian
  • Publication number: 20230411169
    Abstract: A method includes the step of thinning a semiconductor wafer by a horizontal stealth lasing process, and semiconductor wafers, dies and devices formed thereby. After formation of an integrated circuit layer on a semiconductor wafer, the wafer may be thinned by supporting an active surface of the wafer on a rotating chuck, and focusing a horizontally-oriented laser in multiple cycles at different radii within the rotating wafer. Upon completion of the multiple cycles, a portion of the wafer substrate may be removed, leaving the wafer thinned to its final thickness. Thereafter, a vertical stealth lasing process may be performed to cut individual semicondcutor dies from the thinned wafer.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 21, 2023
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yi Wu, Junrong Yan, Zhonghua Qian, Keming Zhou, Kailei Zhang
  • Publication number: 20230402323
    Abstract: A semiconductor die is separated from a semiconductor wafer using a method that involves performing a partial cut on the semiconductor wafer, applying tape lamination to a front side of the semiconductor wafer, grinding a back side of the semiconductor wafer, mounting the semiconductor wafer to a die attach film (DAF) layer, removing the tape lamination from the front side of the semiconductor wafer, and performing a DAF-die separation operation to separate the semiconductor die from the adjacent semiconductor die. A DAF laser is not used during the method of separating a semiconductor die from a semiconductor wafer. The front side is the side of the semiconductor wafer where integrated circuits are exposed. The partial cut is between the semiconductor die and an adjacent semiconductor die. The back side is opposite of the front side and the back side is a silicon layer of the semiconductor die.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Zhengjie ZHU, Junrong YAN, Chee Keong CHIN, Cheng CHANG, Zhonghua QIAN
  • Patent number: 11783346
    Abstract: According to some embodiments, a system may facilitate collaborative transaction processing associated with a supply chain having a first entity and a second entity. In particular, a first entity database may store electronic records including information associated with at least a portion of the supply chain, and a first entity communication port may exchange information via a distributed computer system. A first entity computer processor may retrieve from the first entity database the information associated with the at least a portion of the supply chain. A subset of information about the supply chain may be identified by the first entity computer processor as being of interest to the second entity. The identified subset of information about the supply chain may then be recorded via a secure, distributed transaction ledger.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 10, 2023
    Assignee: General Electric Company
    Inventors: Peter Koudal, Benjamin Edward Beckmann, Annarita Giani, John William Carbone, Joseph Salvo, Junrong Yan, Dan Yang, Patricia MacKenzie, Walter Yund
  • Patent number: 11756932
    Abstract: A semiconductor device package includes a mechanical support structure that provides mechanical support to a stack of dies, where the dies are laterally offset from each other. The support structure has a sloped surface that is disposed at a non-perpendicular and non-parallel angle to other surfaces of the mechanical support structure. Electrical contacts are disposed on the sloped surface of the mechanical support structure for electrically interfacing with the stacked dies and on a different surface of the mechanical support structure for electrically interfacing with a substrate.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: September 12, 2023
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Xianlu Cui, Junrong Yan, Cheekeong Chin, Zhonghua Qian
  • Patent number: 11749647
    Abstract: A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: September 5, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Xiaofeng Di, Junrong Yan, CheeKeong Chin, Weili Wang, Xin Lu, Qi Deng, Chaur Yang Ng, Cong Zhang, Chenlin Yang, Chin-Tien Chiu
  • Publication number: 20230173720
    Abstract: A molding compound dispensing system identifies a semiconductor device strip having a substrate with a plurality of segments allocated for die stacks. The system obtains topological data of the identified semiconductor device strip for each of the segments, including data indicative of any semiconductor components in each respective segment. The system determines an amount of molding compound to be applied to each of the segments based on the topological data for each respective segment, and causes a molding compound dispenser to dispense the determined amounts of molding compound at each of the segments.
    Type: Application
    Filed: December 2, 2021
    Publication date: June 8, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Xianlu Cui, Junrong Yan, CK Chin, Tao Shi
  • Publication number: 20220375899
    Abstract: A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.
    Type: Application
    Filed: May 24, 2021
    Publication date: November 24, 2022
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Xianlu Cui, Junrong Yan, Wei Liu, Zhonghua Qian
  • Patent number: 11445504
    Abstract: The disclosure discloses a method for distributing pilot frequency in a massive antenna system, including: dividing a pilot frequency set into three sub sets that are intersecting with each other, and then dividing the users of each cell into a cell central user and a cell edge user. The cell central users use an intersection set of three pilot frequency sub sets. The cell edge users of all cells use a difference set, an intersection set and a union set of three pilot frequency sub sets according to a certain rule. When it is designing to implement the pilot resource distribution plan of the massive antenna system, three cells that are adjacent with each other in the system are used as a cluster, and a pilot frequency use plan of any one cluster may be designed according to the method proposed by the disclosure, and then the same design plan is applied to other clusters in the system, and then is adjusted according to the user distribution of each cluster and the business distribution circumstance thereof.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: September 13, 2022
    Assignees: SUNWAVE COMMUNICATIONS CO., LTD., BTI WIRELESS LIMITED, BRAVO TECH INC
    Inventors: Fangmin Xu, Junrong Yan, Rulong Chu, Xingbao Ou
  • Publication number: 20220181208
    Abstract: Semiconductor dies formed on a wafer may be picked from the wafer with little or no stress, thus preventing cracking and damage to the semiconductor dies. A die attach film (DAF) layer is laminated onto an inactive surface of the wafer and the DAF layer is cut in the outline of the dies. The inactive surface of the wafer may then be supported on a vacuum chuck without using a dicing tape, and dies transferred from the wafer using a pick and place robot.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 9, 2022
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Xin Tian, Junrong Yan, Chee Keong Chin, Weili Wang, Yang Lei
  • Patent number: 11289395
    Abstract: A process includes forming one or more apertures on a component backside, creating a vacuum in a mold chase, and engaging the component backside with a mold compound in the mold chase. The one or more apertures form an aperture structure. The aperture structure may include multiple apertures parallel or orthogonal to each other. The apertures have an aperture width, aperture depth, and aperture pitch. These characteristics may be altered to minimize the likelihood of trapped air remaining after creating the vacuum in the mold chase.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: March 29, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Junrong Yan, Chee Keong Chin, Xin Lu
  • Publication number: 20220052014
    Abstract: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.
    Type: Application
    Filed: February 26, 2021
    Publication date: February 17, 2022
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yang Lei, Xiaofeng Di, Yuyun Lou, Zhonghua Qian, Junrong Yan
  • Patent number: 11240486
    Abstract: Discrete frequencies and time slots of operation are assigned to each of a plurality of time-of-flight cameras. Where two time-of-flight cameras having overlapping fields of view, whether the time-of-flight cameras are operating at the same frequency or time slot is determined by calculating ratios of zero-value pixels to total numbers of pixels for each depth image captured by the time-of-flight cameras over a selected interval. If the time-of-flight cameras operate at the same frequency or time slot, a plot of the ratios of depth images captured using one time-of-flight camera is erratically sinusoidal. Another time-of-flight camera causing the interference may be identified among time-of-flight cameras operating at the frequency or time slot, based on areas of interest that overlap with the time-of-flight camera, or based on a time at which the time-of-flight cameras began capturing depth images, as compared to a time at which the interference is observed.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: February 1, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Bo Chen, Venkata Sri Krishnakanth Pulla, Junrong Yan
  • Publication number: 20210407967
    Abstract: A semiconductor device package includes a mechanical support structure that provides mechanical support to a stack of dies, where the dies are laterally offset from each other. The support structure has a sloped surface that is disposed at a non-perpendicular and non-parallel angle to other surfaces of the mechanical support structure. Electrical contacts are disposed on the sloped surface of the mechanical support structure for electrically interfacing with the stacked dies and on a different surface of the mechanical support structure for electrically interfacing with a substrate.
    Type: Application
    Filed: November 30, 2020
    Publication date: December 30, 2021
    Applicant: Western Digital Technologies, Inc.
    Inventors: XIANLU CUI, JUNRONG YAN, CHEEKEONG CHIN, ZHONGHUA QIAN
  • Publication number: 20210366875
    Abstract: A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.
    Type: Application
    Filed: December 30, 2020
    Publication date: November 25, 2021
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Xiaofeng Di, Junrong Yan, CheeKeong Chin, Weili Wang, Xin Lu, Qi Deng, Chaur Yang Ng, Cong Zhang, Chenlin Yang, Chin-Tien Chiu
  • Patent number: 11177241
    Abstract: A semiconductor device is disclosed including a die stack including a number of dies aligned with each other with respect to an axis, and a top die that is offset along the axis the to prevent die cracking.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: November 16, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Junrong Yan, Jianming Zhang, Min Zhao, Kailei Zhang, Chee Keong Chin, Kim Lee Bock
  • Publication number: 20210158370
    Abstract: According to some embodiments, a system may facilitate collaborative transaction processing associated with a supply chain having a first entity and a second entity. In particular, a first entity database may store electronic records including information associated with at least a portion of the supply chain, and a first entity communication port may exchange information via a distributed computer system. A first entity computer processor may retrieve from the first entity database the information associated with the at least a portion of the supply chain. A subset of information about the supply chain may be identified by the first entity computer processor as being of interest to the second entity. The identified subset of information about the supply chain may then be recorded via a secure, distributed transaction ledger.
    Type: Application
    Filed: August 31, 2017
    Publication date: May 27, 2021
    Inventors: Peter Koudall, Benjamin Edward Beckmann, Annarita Giani, John William Carbone, Joseph Salvo, Junrong Yan, Dan Yang, Patricia MacKenzie, Walter Yund
  • Publication number: 20210099997
    Abstract: The disclosure discloses a method for distributing pilot frequency in a massive antenna system, including: dividing a pilot frequency set into three sub sets that are intersecting with each other, and then dividing the users of each cell into a cell central user and a cell edge user. The cell central users use an intersection set of three pilot frequency sub sets. The cell edge users of all cells use a difference set, an intersection set and a union set of three pilot frequency sub sets according to a certain rule. When it is designing to implement the pilot resource distribution plan of the massive antenna system, three cells that are adjacent with each other in the system are used as a cluster, and a pilot frequency use plan of any one cluster may be designed according to the method proposed by the disclosure, and then the same design plan is applied to other clusters in the system, and then is adjusted according to the user distribution of each cluster and the business distribution circumstance thereof.
    Type: Application
    Filed: March 29, 2019
    Publication date: April 1, 2021
    Inventors: Fangmin XU, Junrong YAN, Rulong CHU, Xingbao OU
  • Publication number: 20200381401
    Abstract: A semiconductor device is disclosed including a die stack including a number of dies aligned with each other with respect to an axis, and a top die that is offset along the axis the to prevent die cracking.
    Type: Application
    Filed: March 10, 2020
    Publication date: December 3, 2020
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Junrong Yan, Jianming Zhang, Min Zhao, Kailei Zhang, Chee Keong Chin, Kim Lee Bock