Patents by Inventor Junya Furuyashiki

Junya Furuyashiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8274125
    Abstract: An insulation is provided in a portion surrounding a light receiving portion in a semiconductor element, and a sealing resin is provided around the insulation, thereby warping the insulation outward when viewed from the light receiving portion to prevent diffuse light from returning to the light receiving portion of the semiconductor element.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 25, 2012
    Assignee: Panasonic Corporation
    Inventors: Junya Furuyashiki, Noriyuki Yoshikawa, Toshiyuki Fukuda, Toshimasa Itooka, Hiroki Utatsu
  • Publication number: 20110001208
    Abstract: An insulation is provided in a portion surrounding a light receiving portion in a semiconductor element, and a sealing resin is provided around the insulation, thereby warping the insulation outward when viewed from the light receiving portion to prevent diffuse light from returning to the light receiving portion of the semiconductor element.
    Type: Application
    Filed: February 26, 2009
    Publication date: January 6, 2011
    Inventors: Junya Furuyashiki, Noriyuki Yoshikawa, Toshiyuki Fukuda, Toshimasa Itooka, Hiroki Utatsu
  • Publication number: 20100308468
    Abstract: In a semiconductor device made of a plurality of materials, if the device is fabricated through a step of cutting the bonded plurality of materials, a boundary line of the plurality of materials is exposed on a cutting plane. Internal stress in the cutting remains at this boundary line to allow moisture and corrosive gas to easily enter into the device. In order to reduce the entrance of the moisture, the gas, and the like, the boundary appearing on the cutting plane is covered by a covering layer. At this time, partial cutting exposing the boundary line and not separating semiconductor devices are performed so that the covering layer can be formed with the plurality of semiconductor devices attached to the substrate.
    Type: Application
    Filed: March 2, 2009
    Publication date: December 9, 2010
    Inventors: Noriyuki Yoshikawa, Toshiyuki Fukuda, Junya Furuyashiki, Toshimasa Itooka, Hiroki Utatsu
  • Publication number: 20100091630
    Abstract: A plurality of parallel rib prototypes are provided on a flat base plate. A plurality of semiconductor elements are placed in each trench between adjacent ones of the rib prototypes, and a transparent member is bonded to each of the semiconductor elements. Electrode pads of the semiconductor elements are wire bonded to connection electrodes. The trenches are then filled with an encapsulating resin. Thereafter, middle portions, in the longitudinal direction, of the rib prototypes are cut with a dicing saw, and adjacent ones of the semiconductor elements are separated from each other, thereby obtaining semiconductor devices.
    Type: Application
    Filed: March 10, 2008
    Publication date: April 15, 2010
    Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
  • Publication number: 20100008203
    Abstract: A semiconductor element is mounted on a rectangular base of a package including the base and ribs provided on a pair of opposite external edges of the base. Electrode pads of the semiconductor element and connection electrodes provided on rib upper surfaces are connected to each other by metal wires. On the rib upper surfaces, spacers are provided at locations closer to the outside than the connection electrodes. A transparent lid adheres to the upper surfaces of the spacers to cover the entire surface of the package. The height of the spacers is greater than the diameter of the metal wires.
    Type: Application
    Filed: March 10, 2008
    Publication date: January 14, 2010
    Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
  • Publication number: 20100001174
    Abstract: In a semiconductor device, a semiconductor element is mounted on a substantially rectangular package. First ribs are respectively provided on a pair of opposite external edges of a mounting surface and project upward from the pair of opposite external edges. External edges of a lid are placed on the upper surfaces of the first ribs, and fixed thereto with an adhesive. Dams are provided on external edges of the first rib upper surfaces. The adhesive is continuously present from side surfaces of the lid to the dams.
    Type: Application
    Filed: March 10, 2008
    Publication date: January 7, 2010
    Inventors: Junya Furuyashiki, Syouzuo Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida