Patents by Inventor Jun-young OH
Jun-young OH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11962001Abstract: Disclosed is a positive electrode material for a lithium secondary battery. The positive electrode material includes a positive electrode active material formed of Li—[Mn—Ti]-M-O-based material including a transition metal (M) to enable reversible intercalation and deintercalation of lithium and molybdenum oxide. The positive electrode active material is coated with the molybdenum oxide to form a coating layer on a surface thereof.Type: GrantFiled: October 6, 2021Date of Patent: April 16, 2024Assignees: Hyundai Motor Company, Kia Corporation, Industry Academy Cooperation Foundation of Sejong UniversityInventors: Seung Min Oh, Jun Ki Rhee, Yoon Sung Lee, Ji Eun Lee, Sung Ho Ban, Ko Eun Kim, Woo Young Jin, Sang Mok Park, Sang Hun Lee, Seung Taek Myung, Hee Jae Kim, Min Young Shin
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Publication number: 20240120477Abstract: A positive electrode material for a lithium secondary battery has improved electron conductivity and surface stability because oxidation-treated carbon nanotubes are stably attached to the surface of an active material. According to one embodiment the positive electrode material includes a positive electrode active material core made of a Li—Ni—Co—Mn-M-O-based material (M=transition metal) and an oxidized carbon nanotube coating layer formed on the surface of the positive electrode active material core and including 1% to 3% by weight of oxidation-treated carbon nanotubes (OCNT) relative to 100% by weight of the positive electrode active material core.Type: ApplicationFiled: July 7, 2023Publication date: April 11, 2024Inventors: Seung Min Oh, Sung Ho Ban, Sang Hun Lee, Chang Hoon Song, Yoon Sung Lee, Ko Eun Kim, Van Chuong Ho, Jun Young Mun
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Patent number: 11951207Abstract: The present invention provides a stable liquid pharmaceutical formulation containing: an antibody or its antigen-binding fragment; a surfactant; a sugar or its derivative; and a buffer. The stable liquid pharmaceutical formulation according to the present invention has low viscosity while containing a high content of the antibody, has excellent long-term storage stability based on excellent stability under accelerated conditions and severe conditions, and may be administered subcutaneously.Type: GrantFiled: June 28, 2017Date of Patent: April 9, 2024Assignee: Celltrion Inc.Inventors: Joon Won Lee, Won Yong Han, Su Jung Kim, Jun Seok Oh, So Young Kim, Su Hyeon Hong, Yeon Kyeong Shin
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Patent number: 11955359Abstract: The present disclosure provides a magazine supporting equipment for supporting a magazine with multiple input ports. The magazine supporting equipment comprises a contact plate, a first sidewall plate, and a second sidewall plate. The contact plate is in contact with the magazine. The first sidewall plate extends vertically from one end of the contact plate. The second sidewall plate parallel is to the first sidewall plate and extends vertically from one end to the other end of the contact plate. The first sidewall plate extends along at least a part of a first sidewall of the magazine. The second sidewall plate extends along at least a part of a second sidewall of the magazine. The first sidewall plate and the second sidewall plate include control openings through which gas flows in and out.Type: GrantFiled: March 15, 2021Date of Patent: April 9, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Young Oh, Seung Hwan Kim, Jong Ho Park, Yong Kwan Lee, Jong Ho Lee
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Publication number: 20240105918Abstract: A positive electrode material for a lithium secondary battery and a manufacturing method therefor are provided. The positive electrode material may have carbon nanotubes stably attached to a surface of an active material and may exhibit increased electron conductivity and improved surface stability. The positive electrode material for a lithium secondary battery may comprises: a positive electrode active material core comprising a Li—Ni—Co—Mn-M-O-based material, where M is a transition metal; and a carbon nanotube coating layer on a surface of the positive electrode active material core. Carbon nanotubes (CNT) may be in an amount of 1-5 wt %, based on 100 wt % of the positive electrode active material core.Type: ApplicationFiled: July 3, 2023Publication date: March 28, 2024Inventors: Seung Min Oh, Sung Ho Ban, Sang Hun Lee, Chang Hoon Song, Yoon Sung Lee, Ko Eun Kim, Van Chuong Ho, Jun Young Mun
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Patent number: 11699626Abstract: A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.Type: GrantFiled: June 23, 2021Date of Patent: July 11, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Oh, Hyun-ki Kim, Sang-soo Kim, Seung-hwan Kim, Yong-kwan Lee
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Publication number: 20230132272Abstract: The semiconductor device may include a substrate, a first insulating layer on a bottom surface of the substrate, an interconnection structure in the first insulating layer, a second insulating layer on a bottom surface of the first insulating layer, and a plurality of lower pads provided in the second insulating layer. Each lower pad may be provided such a width of a top surface thereof is smaller than a width of a bottom surface thereof. The lower pads may include first, second, and third lower pads. In a plan view, the first and third lower pads may be adjacent to center and edge portions of the substrate, respectively, and the second lower pad may be disposed therebetween. A width of a bottom surface of the second lower pad may be smaller than that of the first lower pad and may be larger than that of the third lower pad.Type: ApplicationFiled: July 22, 2022Publication date: April 27, 2023Inventors: JUN YOUNG OH, UN-BYOUNG KANG, BYEONGCHAN KIM, JUMYONG PARK, CHUNGSUN LEE
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Publication number: 20230095051Abstract: Provided is an electrode rolling apparatus and method for performing a multi-stage induction heating. By use of the apparatus and method, it is possible to prevent camber generation on the non-coated part region during the process of rolling an electrode substrate, and it is possible to increase the efficiency of the manufacturing process.Type: ApplicationFiled: July 9, 2021Publication date: March 30, 2023Applicant: LG Energy Solution, Ltd.Inventors: Hwan Han Kim, Young Woong Son, Jeong Soo Seol, Jun Young Oh
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Patent number: 11610845Abstract: A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.Type: GrantFiled: August 3, 2021Date of Patent: March 21, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jongho Park, Seung Hwan Kim, Jun Young Oh, Kyong Hwan Koh, Sangsoo Kim, Dong-Ju Jang
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Patent number: 11562965Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.Type: GrantFiled: December 28, 2020Date of Patent: January 24, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sun Chul Kim, Sang Soo Kim, Yong Kwan Lee, Hyun Ki Kim, Seok Geun Ahn, Jun Young Oh
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Patent number: 11538801Abstract: A semiconductor package includes a first substrate that includes a first trench on a recessed portion of a bottom surface of the first substrate and a first through hole extending through the first substrate to the first trench, a first semiconductor chip on the first substrate, a first capacitor chip in the first trench and on the first substrate, and a first molding layer on the first substrate and covering the first semiconductor chip. The first molding layer includes a first part that extends parallel to a top surface of the first substrate, a second part connected to the first part and extending vertically in the first through hole, and a third part connected to the second part and surrounding the first capacitor chip. A bottom surface of the third part is coplanar with the bottom surface of the first substrate.Type: GrantFiled: April 1, 2021Date of Patent: December 27, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jongho Park, Seung Hwan Kim, Jun Young Oh, Jungjoo Kim, Yongkwan Lee, Dong-Ju Jang
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Publication number: 20220068904Abstract: A semiconductor package includes a first substrate that includes a first trench on a recessed portion of a bottom surface of the first substrate and a first through hole extending through the first substrate to the first trench, a first semiconductor chip on the first substrate, a first capacitor chip in the first trench and on the first substrate, and a first molding layer on the first substrate and covering the first semiconductor chip. The first molding layer includes a first part that extends parallel to a top surface of the first substrate, a second part connected to the first part and extending vertically in the first through hole, and a third part connected to the second part and surrounding the first capacitor chip. A bottom surface of the third part is coplanar with the bottom surface of the first substrate.Type: ApplicationFiled: April 1, 2021Publication date: March 3, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Jongho PARK, Seung Hwan KIM, Jun Young OH, Jungjoo KIM, Yongkwan LEE, Dong-Ju JANG
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Publication number: 20210391199Abstract: The present disclosure provides a magazine supporting equipment for supporting a magazine with multiple input ports. The magazine supporting equipment comprises a contact plate, a first sidewall plate, and a second sidewall plate. The contact plate is in contact with the magazine. The first sidewall plate extends vertically from one end of the contact plate. The second sidewall plate parallel is to the first sidewall plate and extends vertically from one end to the other end of the contact plate. The first sidewall plate extends along at least a part of a first sidewall of the magazine. The second sidewall plate extends along at least a part of a second sidewall of the magazine. The first sidewall plate and the second sidewall plate include control openings through which gas flows in and out.Type: ApplicationFiled: March 15, 2021Publication date: December 16, 2021Inventors: Jun Young OH, Seung Hwan KIM, Jong Ho PARK, Yong Kwan LEE, Jong Ho LEE
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Publication number: 20210366832Abstract: A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.Type: ApplicationFiled: August 3, 2021Publication date: November 25, 2021Inventors: JONGHO PARK, SEUNG HWAN KIM, JUN YOUNG OH, Kyong Hwan KOH, SANGSOO KIM, DONG-JU JANG
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Publication number: 20210366834Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.Type: ApplicationFiled: December 28, 2020Publication date: November 25, 2021Inventors: Sun Chul Kim, Sang Soo Kim, Yong Kwan Lee, Hyun Ki Kim, Seok Geun Ahn, Jun Young Oh
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Publication number: 20210320043Abstract: A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.Type: ApplicationFiled: June 23, 2021Publication date: October 14, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-young OH, Hyun-ki KIM, Sang-soo KIM, Seung-hwan KIM, Yong-kwan LEE
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Patent number: 11107769Abstract: A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.Type: GrantFiled: April 10, 2020Date of Patent: August 31, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jongho Park, Seung Hwan Kim, Jun Young Oh, Kyong Hwan Koh, Sangsoo Kim, Dong-Ju Jang
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Patent number: 11069588Abstract: A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.Type: GrantFiled: March 19, 2019Date of Patent: July 20, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Oh, Hyun-ki Kim, Sang-soo Kim, Seung-hwan Kim, Yong-kwan Lee
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Publication number: 20210035913Abstract: A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.Type: ApplicationFiled: April 10, 2020Publication date: February 4, 2021Inventors: JONGHO PARK, Seung Hwan Kim, Jun Young Oh, Kyong Hwan Koh, Sangsoo Kim, Dong-Ju Jang
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Publication number: 20200043820Abstract: A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.Type: ApplicationFiled: March 19, 2019Publication date: February 6, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-young OH, Hyun-ki KIM, Sang-soo KIM, Seung-hwan KIM, Yong-kwan LEE