Patents by Inventor Jurgen Hissen
Jurgen Hissen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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WIRELESS COMMUNICATION SYSTEM, POWER AMPLIFIER AND METHOD OF DETERMINING POWER AMPLIFIER PERFORMANCE
Publication number: 20230421118Abstract: A wireless communication system includes a power amplifier (PA) configured to receive a radio frequency (RF) input signal and to produce a PA output signal, the PA output signal being an amplified version of the RF input signal. A sensor subsystem is configured to perform asynchronous statistical sampling of the RF input signal and of the PA output signal and to generate a sensor subsystem output. A controller, in communication with the sensor subsystem, is configured to obtain the sensor subsystem output and to infer performance of the PA, and may control one or more of a plurality of internal PA parameters. The controller may include a neural network processor to associate a particular statistical input/output characterization with a particular inferred performance for the PA. Compared to known approaches, the system is scalable and achieves lower power consumption, and is configured to obtain information about linearity performance.Type: ApplicationFiled: June 27, 2022Publication date: December 28, 2023Inventors: Jurgen HISSEN, Bernard Joseph Andre GUAY, Matthew William MCADAM -
Publication number: 20200064661Abstract: Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Inventor: Jurgen Hissen
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Patent number: 10459259Abstract: Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.Type: GrantFiled: January 9, 2018Date of Patent: October 29, 2019Assignee: Maxlinear, Inc.Inventor: Jurgen Hissen
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Publication number: 20180196287Abstract: Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.Type: ApplicationFiled: January 9, 2018Publication date: July 12, 2018Inventor: Jurgen Hissen
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Patent number: 8315303Abstract: Apparatus and methods apply pre-emphasis to the phase rather of a signal than to the amplitude of a single. This approach can provide superior pre-emphasis performance than the conventional amplitude pre-emphasis techniques in certain situations, such as when a non-linear slicer is present in the signal path. For example, electrical-to-optical (E/O) and optical-to-electrical (O/E) converters can effectively slice a signal.Type: GrantFiled: April 25, 2008Date of Patent: November 20, 2012Assignee: PMC-Sierra, Inc.Inventors: Jatinder Chana, Jurgen Hissen, Hossein Hashemi
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Patent number: 8249207Abstract: Methods and apparatus are disclosed, such as those involving clock and data recovery sampler calibration. One such method includes receiving an electronic data stream by a clock and data recovery (CDR) circuit comprising a data sampler and an edge sampler. The data stream includes data portions and transitioning portions. The method further includes conducting calibration of the CDR circuit. The calibration includes acquiring samples from the transitioning portions of the data stream using the data sampler; and calibrating the data sampler based at least partially on the samples acquired using the data sampler. The method allows one not only to improve performance, but also to improve yield and reduce testing and screening requirements without requiring any additional circuitry to detect the offsets and works with regular input signals.Type: GrantFiled: February 29, 2008Date of Patent: August 21, 2012Assignee: PMC-Sierra, Inc.Inventors: Jurgen Hissen, Dragos Cartina
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Patent number: 8024142Abstract: A method and system for analyzing a signal waveform that comprises digitally sampling a signal at a periodic sampling interval, and accumulating a count of samples of the signal at a given logic level relative to a threshold value over a given period. The threshold value is stepped through a series of values while the accumulating of samples is repeated at a series of different clock offsets. The accumulated counts permit a statistical distribution of the signal waveform to be determined. A signal density can also be calculated by determining the difference between the count of adjacent samples at successive threshold values.Type: GrantFiled: December 20, 2007Date of Patent: September 20, 2011Assignee: PMC-Sierra US, Inc.Inventors: Mathieu Gagnon, Jurgen Hissen
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Patent number: 7876866Abstract: A method and apparatus are provided for reducing, and preferably substantially eliminating, data-pattern autocorrelations found in digital communication systems. The method employed is referred to as Data Subset Selection (DSS) and is implemented in the form of DSS engine. Autocorrelations in the data-pattern can cause many digital adaptive systems to converge to an incorrect solution. For example, the LMS method, which is often used in adaptive filtering applications, can converge to an incorrect set of filter coefficients in the presence of data-pattern autocorrelations. Digital timing recovery methods are also susceptible. Other impairments that result from data-pattern autocorrelations include increased convergence time and increased steady-state chatter.Type: GrantFiled: January 26, 2006Date of Patent: January 25, 2011Assignee: PMC-Sierra US, Inc.Inventors: Matthew W. McAdam, Jurgen Hissen, Graeme Boyd
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Patent number: 7508266Abstract: A method and apparatus for linearizing the gain of a common-source field effect transistor (FET) amplifier. The method involves connecting a capacitive load in parallel with the gate of the FET through a switch, and opening and closing this switch depending on the voltage on the gate of the FET. The result is a FET amplifier circuit that has a substantially linear transcapacitance characteristic, making it a useful circuit for low-distortion high-power amplifiers such as xDSL line drivers.Type: GrantFiled: August 29, 2007Date of Patent: March 24, 2009Assignee: PMC-Sierra, Inc.Inventors: Jurgen Hissen, Matthew W. McAdam
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Patent number: 7363563Abstract: Methods and apparatus provide a transceiver, such as a serializer/deserializer device (SerDes), with enhanced built-in self test (BIST). A built-in self test circuit is provided that decouples a clock signal used for receiving data from a clock signal used in transmitting data. This permits data tracking circuitry of a receiver to be efficiently tested with a relatively simple loop back test.Type: GrantFiled: December 6, 2004Date of Patent: April 22, 2008Assignee: PMC-Sierra, Inc.Inventors: Jurgen Hissen, Brett Clark, Stephen Hiroshi Dick, Chris Siu
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Patent number: 7339989Abstract: An apparatus and method are provided for equalizing a dispersive channel based on in-phase and quadrature samples corresponding to an input signal. An equalizer according to the present invention uses a novel adaptation algorithm to adjust filtering characteristics based on previous in-phase samples and a current quadrature sample. The adaptation algorithm is configured to update filter coefficients in response to detecting a transition in the in-phase samples. The equalizer provides equalization for quadrature post-cursor intersymbol interference (ISI) components of the input signal. In an embodiment, the equalizer also provides equalization for in-phase post-cursor ISI components, quadrature precursor ISI components, in-phase precursor ISI components, or a combination of the forgoing.Type: GrantFiled: April 5, 2004Date of Patent: March 4, 2008Assignee: PMC-Sierra, Inc.Inventors: Matthew W. McAdam, John P. Plasterer, Jurgen Hissen
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Patent number: 7200170Abstract: A loopback circuit for testing low and high frequency operation of integrated circuit transmitter and receiver components. First and second resistors forming a first branch of the circuit are series-connected between first and second circuit ports. Third and fourth resistors forming a second branch of the circuit are series-connected between third and fourth circuit ports. A DC isolator is connected between the first and second branches. At lower frequencies, the two branches are DC-isolated, enabling ATE-measurement of the transmitter's output drive level independently of the receiver, continuity testing of ESD protection structures, etc. At higher frequencies, the transmitter's output signal is split into three portions, each of which is attenuated by a selected amount. One of the attenuated signal portions is applied to the receiver to test the receiver's sensitivity, independently of possible excess resiliency in the transmitter's output drive level.Type: GrantFiled: July 12, 2002Date of Patent: April 3, 2007Assignee: PMC-Sierra, Inc.Inventors: Lisa Ann Desandoli, Jurgen Hissen, Kenneth William Ferguson, Gershom Birk
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Patent number: 7177352Abstract: Methods and apparatus for canceling pre-cursor inter-symbol interference (ISI) are disclosed. In a digital communication system, a significant amount of noise can be attributed to the pre-cursor portion of the ISI. In a receiver, it can be relatively difficult to compensate for pre-cursor ISI in part because pre-cursor ISI is a result of one or more symbols that have yet to arrive at the receiver. One embodiment removes a portion of this ISI by using multiple detection thresholds in parallel. For example, data slicing (generation of a hard decision) can include three thresholds. These thresholds for slicing include a positive offset, a negative offset and no offset. The positive and negative offsets can correspond to the expected pre-cursor component of the data channel for which the data is transmitted or to a fraction thereof. The path with the correctly-compensated ISI is selected later.Type: GrantFiled: May 31, 2005Date of Patent: February 13, 2007Assignee: PMC-Sierra, Inc.Inventors: John Plasterer, Jurgen Hissen, Mathew McAdam, Anthony Eugene Zortea, Ognjen Katic
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Patent number: 6812733Abstract: Circuits and devices for an efficient, mixed voltage/current mode output driver. An output driver circuit includes a series terminated voltage mode driver circuit parallel with a current mode driver circuit. The output driver allows for a highly efficient driver but with an easily controllable output. It can be used for driving single ended or doubly terminated transmission lines.Type: GrantFiled: August 2, 2002Date of Patent: November 2, 2004Assignee: PMC-Sierra, Inc.Inventors: John Philip Plasterer, Jurgen Hissen, Victor Lee
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Patent number: 6097253Abstract: A high speed, low-power transresistance amplifier incorporating a threshold-biased, current-mode feedback inverter. Starvation transistors are connected between the inverter's power supply terminals and the supply. Capacitors are connected between the power supply and the nodes at which the starvation transistors are connected to the inverter to bypass the starvation transistors and decrease the AC impedance of the nodes, as seen by the inverter. A resistive network connected between the starvation transistors and a bias voltage supply decreases the effective DC impedance of the nodes.Type: GrantFiled: February 12, 1999Date of Patent: August 1, 2000Assignee: PMC-Sierra Ltd.Inventor: Jurgen Hissen