Abstract: In a television receiving section for receiving an analog television signal converted to an intermediate frequency by a mixer (3) and subsequently selected in an intermediate frequency filter (6) which is followed by an A/D converter (7), the intermediate frequency is an integral multiple of the sample clock frequency of the A/D converter (7) for the purpose of simultaneous demodulation of the television signal.

Abstract: An input signal comprising pulses in periodical intervals and being present as a series of digital sampling values is applied to a correlator for generating a correlator output signal which assumes an extreme value in the case of a pulse. The correlator comprises a chain of at least two cascaded delay members, the first of which receives the input signal. A pulse and pulse-free interval, respectively is associated with each delay member of the series, the delay members succeeding each other in the same manner as the pulses or pulse-free intervals occur. All but at most one delay member at the beginning or end of the chain can store just all sampling values of the associated pulse or pulse-free interval. The input signal of the first delay member and the output signals of all delay members are applied to a combination circuit which linearly combines and integrates the signals and forms the output signal of the correlator.

Abstract: The invention relates to a circuit arrangement for increasing the resolution of color contours. A slope detector detects the slope of the luminance signal and, when a predetermined slope value is exceeded, produces a detection signal for energizing a counter. The counter controls an edge enhancement circuit for a color difference signal, in which, as soon as the counter is energizing, the value of the color difference signal is stored and is available as an output signal. After a predetermined number of equidistant clock pulses has been counted, the edge enhancement circuit (7, 16) supplies the actual color difference signal value. If before the end of the counting operation, a new detection signal is produced, then the edge enhancement circuit briefly receives and stores the actual color difference signal value, and the counter starts a new counting cycle.

Abstract: The invention relates to a gated control circuit for controlling an input signal, for example the chrominance signal formed by the color synchronizing signal and the color difference signal of a FBAS signal. The chrominance signal is controlled in dependence on the amplitude of the color synchronizing signal. To that end the color synchronizing signal is applied to an amplitude detector (3), the difference between the output signal of the amplitude detector (3) and a desired value is formed and the result is stored in a register (5). The output signal of the register (5) is applied to a control member (6) having an integrating behavior and including a counter whose counting rate can be changed in dependence on the value of the comparator circuit (4). The chrominance signal and the output signal of the control member (6) are applied to an adjusting member (1, 2), so that the chrominance signal is changed in accordance with the control deviation.

Abstract: In a circuit arrangement for deriving digital color signals from an analog television signal by means of an A/D converter, which forms a digital television signal from the analog television signal in synchronism with a clock signal which corresponds to a whole multiple of the line frequency of the television signal, and further by means of a demodulator, a first phase detector, a first phase calculator and a signal generator, which are interconnected in a phase-locked loop, interference-free demodulation of the chrominance signal in the composite television signal is guaranteed, even when the frequency of the clock signal fluctuates, in that the first phase calculator is supplied not only with a color phase signal from the first phase detector but also with a reference phase signal from a reference circuit which is a measure of the frequency difference or phase difference between the clock signal and a reference signal of stable frequency.

Abstract: By means of a digital filter, the chrominance signal is separated from the digitized picture signal and is applied to a variable-gain amplifier which is formed by the series arrangement of a shift stage and a multiplier. The two stages are controlled by a control circuit which receives the maximum amplitude value of the color synchronizing signal, obtained in a digital manner. Depending on this amplitude value the position of the chrominance signal is shifted and thereafter multiplied in the multiplier by a factor of, for example, between 0.5 and 1. Acting thus, the gain factor is split into two sub-factors, one of which is an integral power of 2 and in this way the multiplier is utilized in a much more advantageous manner. The amplitude value of the color synchronizing signal is measured before the amplifier, so that the control is a forward control, none of the problems occurring with closed control loops now being present.