Patents by Inventor JUSTIN C. HACKLEY

JUSTIN C. HACKLEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130250
    Abstract: A Josephson junction (JJ) device is disclosed that includes a first superconductor structure having a bottom superconductor arm portion and a second superconductor structure having a top superconductor arm portion disposed substantially orthogonal to the bottom superconductor arm portion and overlapping the bottom superconductor arm portion in a JJ operation region. The JJ device further includes a dielectric material layer acting as a tunnel barrier disposed between the bottom superconductor arm portion and the top superconductor arm portion in the JJ operation region to form an operating JJ.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: PATRICK R. WARNER, JUSTIN C. HACKLEY, SHAWN A. KEEBAUGH, AURELIUS L. GRANINGER
  • Publication number: 20230380300
    Abstract: A Josephson junction (JJ) device is provided. The JJ device comprises an operating JJ, a first hydrogen-trapping JJ having a first end coupled to a first end of the operating JJ and a second end coupled to a first superconductor wire, and a second hydrogen-trapping JJ having a first end coupled to a second end of the operating JJ and a second end coupled to a second superconductor wire. The first hydrogen-trapping JJ and the second hydrogen-trapping JJ mitigates hydrogen diffusion into the operating JJ.
    Type: Application
    Filed: May 17, 2022
    Publication date: November 23, 2023
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Justin C. Hackley, Patrick R. Warner
  • Publication number: 20230369270
    Abstract: A method of forming a multi-chip system is disclosed. The method includes forming one or more bumps on respective conductive contact pads of a first electronic device, forming one or more mini-bumps on respective conductive contact pads of a second electronic device, and aligning respective one or more mini-bumps with respective one or more bumps. The method further includes performing a bump bonding process that exerts compression force on one or both the first electronic device and the second electronic device to compress the one or more mini-bumps into the one or more bumps to form one or more bump bond structures that bond the second electronic device to the first electronic device.
    Type: Application
    Filed: May 16, 2022
    Publication date: November 16, 2023
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: JUSTIN C. HACKLEY, JEFFREY DAVID HARTMAN
  • Patent number: 11616187
    Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: March 28, 2023
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Aurelius L. Graninger, Joel D. Strand, Micah John Atman Stoutimore, Zachary Kyle Keane, Jeffrey David Hartman, Justin C. Hackley
  • Publication number: 20210257532
    Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
    Type: Application
    Filed: February 5, 2021
    Publication date: August 19, 2021
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: AURELIUS L. GRANINGER, JOEL D. STRAND, MICAH JOHN ATMAN STOUTIMORE, ZACHARY KYLE KEANE, JEFFREY DAVID HARTMAN, JUSTIN C. HACKLEY
  • Patent number: 10950778
    Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: March 16, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Aurelius L. Graninger, Joel D. Strand, Micah John Atman Stoutimore, Zachary Kyle Keane, Jeffrey David Hartman, Justin C. Hackley
  • Publication number: 20200220064
    Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 9, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: AURELIUS L. GRANINGER, JOEL D. STRAND, MICAH JOHN ATMAN STOUTIMORE, ZACHARY KYLE KEANE, JEFFREY DAVID HARTMAN, JUSTIN C. HACKLEY
  • Patent number: 10651233
    Abstract: A superconducting structure includes a first superconducting device having a plurality of first superconducting contact pads disposed on a top side of a first superconducting device, a second superconducting device having a plurality of second superconducting contact pads disposed on a bottom side of a second superconducting device, and a plurality of superconducting bump structures with a given bump structure coupling respective superconducting contact pads of the plurality of first superconducting contact pads and the second plurality of superconducting pads to one another to bond the first superconducting device to the second superconducting device. Each superconducting bump structure includes a first under bump metallization (UBM) layer disposed on the top surface of a given superconducting contact pad, a second UBM layer disposed on the top surface of a given superconducting contact pads, and a superconducting metal layer coupling the first UBM layer to the second UBM layer.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: May 12, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Jeffrey David Hartman, Justin C. Hackley
  • Publication number: 20200066789
    Abstract: A superconducting structure includes a first superconducting device having a plurality of first superconducting contact pads disposed on a top side of a first superconducting device, a second superconducting device having a plurality of second superconducting contact pads disposed on a bottom side of a second superconducting device, and a plurality of superconducting bump structures with a given bump structure coupling respective superconducting contact pads of the plurality of first superconducting contact pads and the second plurality of superconducting pads to one another to bond the first superconducting device to the second superconducting device. Each superconducting bump structure includes a first under bump metallization (UBM) layer disposed on the top surface of a given superconducting contact pad, a second UBM layer disposed on the top surface of a given superconducting contact pads, and a superconducting metal layer coupling the first UBM layer to the second UBM layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: JEFFREY DAVID HARTMAN, JUSTIN C. HACKLEY