Patents by Inventor Ju Young Yun
Ju Young Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8265720Abstract: Disclosed herein is a hinge device for a cellular phone, which has no device housing and thus, can achieve a greater slimness of the cellular phone and reduce the generation of a noise during a sliding operation of a slide body included in the cellular phone. The hinge device includes a first push rod connected to a main body of the cellular phone and having a pin and a pin hole, and a second push rod connected to a slide body of the cellular phone and having a pin and a pin hole. The pin of the first push rod is penetrated through the pin hole of the second push rod, and the pin of the second push rod is penetrated through the pin hole of the first push rod. A spring is provided around each pin.Type: GrantFiled: May 23, 2007Date of Patent: September 11, 2012Assignee: Diabell Co., Ltd.Inventors: Sung-Sang Ahn, Ju-Young Yun
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Publication number: 20110231251Abstract: Provided are a digital broadcast network system for providing a widget service and an operating method thereof The digital broadcast network system includes a communication network, a broadcast terminal, and a broadcasting station system. The broadcasting station system provides widget advertisement contents, received from a widget content provider, to the broadcast terminal. The broadcast terminal outputs the received widget advertisement contents to a display unit in response to a widget display control signal, and transmits product purchase information to the broadcasting station system when receiving a purchase request signal for products included in the widget advertisement contents.Type: ApplicationFiled: May 13, 2010Publication date: September 22, 2011Inventors: Ho Yeon Jang, Ju Young Yun
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Patent number: 7830505Abstract: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.Type: GrantFiled: August 7, 2008Date of Patent: November 9, 2010Assignee: Korea Research Institute of Standards and ScienceInventors: Sang Woo Kang, Ju Young Yun, Dae Jin Seong, Yong Hyeon Shin
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Publication number: 20100154168Abstract: Disclosed herein is a hinge device for a cellular phone, which has no device housing and thus, can achieve a greater slimness of the cellular phone and reduce the generation of a noise during a sliding operation of a slide body included in the cellular phone. The hinge device includes a first push rod connected to a main body of the cellular phone and having a pin and a pin hole, and a second push rod connected to a slide body of the cellular phone and having a pin and a pin hole. The pin of the first push rod is penetrated through the pin hole of the second push rod, and the pin of the second push rod is penetrated through the pin hole of the first push rod. A spring is provided around each pin.Type: ApplicationFiled: May 23, 2007Publication date: June 24, 2010Applicant: DIABELL CO., LTD.Inventors: Sung-Sang Ahn, Ju-Young Yun
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Publication number: 20090064756Abstract: The present invention provides a vacuum gauge calibration apparatus capable of calibrating and testing a vacuum gauge without displacement or separation of the vacuum gauge, the vacuum gauge being attached to a vacuum device under operation together with developing a movable vacuum gauge calibration device, and an operating method thereof.Type: ApplicationFiled: November 9, 2007Publication date: March 12, 2009Applicant: Korea Research Institute of Standards and ScienceInventors: Seung Soo Hong, Jin Tae Kim, Ju Young Yun
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Publication number: 20090046285Abstract: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.Type: ApplicationFiled: August 7, 2008Publication date: February 19, 2009Inventors: Sang Woo Kang, Ju Young Yun, Dae Jin Seong, Yong Hyeon Shin
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Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
Patent number: 7384866Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.Type: GrantFiled: March 31, 2005Date of Patent: June 10, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo -
Publication number: 20080000585Abstract: The present invention relates to an apparatus and method for monitoring an electron density and electron temperature of a plasma.Type: ApplicationFiled: August 24, 2006Publication date: January 3, 2008Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCEInventors: Jung Hyung Kim, Ju Young Yun, Dae Jin Seong
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Patent number: 7211769Abstract: A heating chamber which can be used during a reflow process to form a metal wiring having a multi-layered writing structure and a method of heating a wafer using the same, are provided. The heating chamber is movable upward and downward between the upper process position and the lower loading position, and includes a pedestal having a supporting surface for supporting a wafer, a cover installed above the pedestal to form a processing area together with the supporting surface when the pedestal is placed in its raised process position and a heating unit for heating the waver. In the method of heating the wafer, the temperature in the processing area is maintained suitable for heating the wafer before the wafer is loaded onto the supporting surface, the wafer is loaded onto the supporting surface and the loaded wafer is heating in the processing area.Type: GrantFiled: April 1, 2002Date of Patent: May 1, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-Hee Kim, Jong-Myeong Lee, Myoung-Bum Lee, Ju-Young Yun, Gil-Heyun Choi
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Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
Patent number: 6955983Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.Type: GrantFiled: February 24, 2003Date of Patent: October 18, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo -
Patent number: 6951814Abstract: Methods of forming a metal wiring layer on an integrated circuit include forming an insulating pattern including a recess region on an integrated circuit substrate. A metal layer is formed in the recess region and on a top surface of the insulting pattern. The metal layer is removed from the top surface of the insulating pattern adjacent the recess region and from an upper portion of the recess region. An aluminum film is formed on the metal layer at a process temperature less than a reflow temperature of the metal layer to substantially fill the upper portion of the recess region after removing the metal layer. A metal film is formed on the aluminum film at a process temperature less than the reflow temperature of the etched metal layer.Type: GrantFiled: August 27, 2003Date of Patent: October 4, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-hee Kim, Gil-heyun Choi, Ju-young Yun, Jung-hun Seo
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Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
Publication number: 20050179141Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.Type: ApplicationFiled: March 31, 2005Publication date: August 18, 2005Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo -
Patent number: 6849555Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.Type: GrantFiled: May 30, 2003Date of Patent: February 1, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-myeong Lee, Byung-hee Kim, Myoung bum Lee, Ju-young Yun, Gil-heyun Choi
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Publication number: 20040096571Abstract: Methods of forming a metal wiring layer on an integrated circuit include forming an insulating pattern including a recess region on an integrated circuit substrate. A metal layer is formed in the recess region and on a top surface of the insulting pattern. The metal layer is removed from the top surface of the insulating pattern adjacent the recess region and from an upper portion of the recess region. An aluminum film is formed on the metal layer at a process temperature less than a reflow temperature of the metal layer to substantially fill the upper portion of the recess region after removing the metal layer. A metal film is formed on the aluminum film at a process temperature less than the reflow temperature of the etched metal layer.Type: ApplicationFiled: August 27, 2003Publication date: May 20, 2004Inventors: Byung-Hee Kim, Gil-Heyun Choi, Ju-Young Yun, Jung-Hun Seo
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Publication number: 20040082167Abstract: A recess is formed in a microelectronic substrate, and then a metal-containing layer is formed that conforms to an inner surface of the recess and to a surface of the substrate adjacent the recess. A carbon concentration in a portion of the metal-containing layer on the surface of the substrate adjacent the recess is decreased in comparison to a portion of the metal-containing layer within the recess, e.g., using a plasma treatment that has a greater effect on the surface outside of the recess. Aluminum is then deposited on the metal-containing layer to form an aluminum layer that conforms to the inner surface of the recess and to the surface of the substrate adjacent the recess. Preferably, the carbon concentration in the portion of the metal-containing layer within the recess is sufficiently great to cause aluminum to deposited at a greater rate on the portion of the metal-containing layer within the recess.Type: ApplicationFiled: July 16, 2003Publication date: April 29, 2004Inventors: Jung-Hun Seo, Gil-Heyun Choi, Ju-Young Yun, Byung-Hee Kim, Seung-Gil Yang
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Publication number: 20030222346Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.Type: ApplicationFiled: February 24, 2003Publication date: December 4, 2003Inventors: Ju-Young Yun, Gil-Heyun Choi, Byung-Hee Kim, Jong-Myeong Lee, Seung-Gil Yang, Jung-Hun Seo
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Publication number: 20030207522Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.Type: ApplicationFiled: June 2, 2003Publication date: November 6, 2003Inventors: Jong-Myeong Lee, Byung-Hee Kim, Myoung Bum Lee, Ju-Young Yun, Gil-Heyun Choi
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Patent number: 6586340Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.Type: GrantFiled: March 13, 2002Date of Patent: July 1, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-myeong Lee, Byung-hee Kim, Myoung bum Lee, Ju-young Yun, Gil-heyun Choi
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Publication number: 20030000936Abstract: A heating chamber which can be used during a reflow process to form a metal wiring having a multi-layered writing structure and a method of heating a wafer using the same, are provided. The heating chamber is movable upward and downward between the upper process position and the lower loading position, and includes a pedestal having a supporting surface for supporting a wafer, a cover installed above the pedestal to form a processing area together with the supporting surface when the pedestal is placed in its raised process position and a heating unit for heating the waver. In the method of heating the wafer, the temperature in the processing area is maintained suitable for heating the wafer before the wafer is loaded onto the supporting surface, the wafer is loaded onto the supporting surface and the loaded wafer is heating in the processing area.Type: ApplicationFiled: April 1, 2002Publication date: January 2, 2003Applicant: Samsung Electronics Co., Ltd.Inventors: Byung-Hee Kim, Jong-Myeong Lee, Myoung-Bum Lee, Ju-Young Yun, Gil-Heyun Choi
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Publication number: 20020132487Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.Type: ApplicationFiled: March 13, 2002Publication date: September 19, 2002Inventors: Jong-Myeong Lee, Byung-Hee Kim, Myoung Bum Lee, Ju-Young Yun, Gil-Heyun Choi