Patents by Inventor Jyh-Ming Hung

Jyh-Ming Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136401
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.
    Type: Application
    Filed: January 5, 2024
    Publication date: April 25, 2024
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Patent number: 11908900
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Patent number: 11837613
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jyh-Ming Hung, Tzu-Jui Wang, Kuan-Chieh Huang, Jhy-Jyi Sze
  • Publication number: 20230369360
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Jyh-Ming Hung, Tzu-Jui WANG, Kuan-Chieh HUANG, Jhy-Jyi SZE
  • Patent number: 11508817
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Publication number: 20220367638
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Publication number: 20210375959
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Application
    Filed: April 12, 2021
    Publication date: December 2, 2021
    Inventors: Jyh-Ming HUNG, Tzu-Jui WANG, Kuan-Chieh HUANG, Jhy-Jyi SZE
  • Publication number: 20210376086
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.
    Type: Application
    Filed: September 29, 2020
    Publication date: December 2, 2021
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Patent number: 8816457
    Abstract: The present disclosure provides various embodiments of an image sensor device. An exemplary image sensor device includes an image sensing region disposed in a substrate; a multilayer interconnection structure disposed over the substrate; and a color filter formed in the multilayer interconnection structure and aligned with the image sensing region. The color filter has a length and a width, where the length is greater than the width.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyh-Ming Hung, Jen-Cheng Liu, Dun-Nian Yaung, Chun-Chieh Chuang
  • Patent number: 8293122
    Abstract: A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: October 23, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Jyh-Ming Hung, Pao-Tung Chen
  • Patent number: 8164124
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concentration; a second epitaxy semiconductor layer disposed over the first epitaxy semiconductor layer and having the first type of dopant and a second doping concentration less than the first doping concentration; and an image sensor on the second epitaxy semiconductor layer.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: April 24, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Cheng Liu, Dun-Nian Yaung, Jyh-Ming Hung, Wen-De Wang, Chun-Chieh Chuang
  • Patent number: 7968424
    Abstract: Provided is a method of implanting dopant ions to an integrated circuit. The method includes forming a first pixel and a second pixel in a substrate, forming an etch stop layer over the substrate, forming a hard mask layer over the etch stop layer, patterning the hard mask layer to include an opening between the first pixel and the second pixel, and implanting a plurality of dopants through the opening to form an isolation feature.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: June 28, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Pao-Tung Chen, Wen-De Wang, Jyh-Ming Hung
  • Publication number: 20100181283
    Abstract: A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 22, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Jyh-Ming Hung, Pao-Tung Chen
  • Publication number: 20100184242
    Abstract: Provided is a method of implanting dopant ions to an integrated circuit. The method includes forming a first pixel and a second pixel in a substrate, forming an etch stop layer over the substrate, forming a hard mask layer over the etch stop layer, patterning the hard mask layer to include an opening between the first pixel and the second pixel, and implanting a plurality of dopants through the opening to form an isolation feature.
    Type: Application
    Filed: January 16, 2009
    Publication date: July 22, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Pao-Tung Chen, Wen-De Wang, Jyh-Ming Hung
  • Publication number: 20080303932
    Abstract: Provided is an image sensor device including a substrate with a pixel region and a peripheral region. A first isolation structure is formed on the substrate in the pixel region. The first isolation structure includes a trench having a first depth. A second isolation structure is formed on the substrate in the peripheral region. The second isolation structure includes a trench having a second depth. The first depth is greater than the second depth.
    Type: Application
    Filed: May 13, 2008
    Publication date: December 11, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung, Chun-Chieh Chuang, Jyh-Ming Hung
  • Publication number: 20080246063
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concentration; a second epitaxy semiconductor layer disposed over the first epitaxy semiconductor layer and having the first type of dopant and a second doping concentration less than the first doping concentration; and an image sensor on the second epitaxy semiconductor layer.
    Type: Application
    Filed: May 22, 2007
    Publication date: October 9, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Cheng Liu, Dun-Nian Yaung, Jyh-Ming Hung, Wen-De Wang, Chun-Chieh Chuang
  • Publication number: 20080217659
    Abstract: An image sensor device includes a semiconductor substrate having a first type of conductivity, a first layer overlying the semiconductor substrate and having the first type of conductivity, a second layer overlying the first layer and having a second type of conductivity different than the first type of conductivity, and a plurality of pixels formed in the second layer.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 11, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jyh-Ming Hung, Dun-Nian Yaung